Chapter 3
3-12
Advanced Chipset Features
Note:
Change these settings only if you are familiar with the chipset.
Configure DRAM Timing
This setting determines whether DRAM timing is configured by reading the
contents of the SPD (Serial Presence Detect) EPROM on the DRAM module.
Selecting
By SPD
makes the following settings automatically determined by
BIOS according to the configurations on the SPD. Setting options:
By SPD, By
User
.
CAS# Latency
The field controls the CAS latency, which determines the timing delay
before SDRAM starts a read command after receiving it. Setting options:
1.5, 2
,
2.5
.
1.5
increases system performance while
2.5
provides more
stable system performance.
Precharge Delay
This setting controls the number of clock cycles for DRAM to be allowed
to precharge from the active state. Setting options:
7, 6, 5
.
The Advanced Chipset Features Setup option is used to change the values of
the chipset registers. These registers control most of the system options in the
computer.