Meikon
MAMC-XLINK – Technical Reference Manual
3.4 AMC Clock Interface
AMC backplane clock port FCLKA (Clock 3) is connected to a clock selector, in order to be
used as a reference clock for PCI Express. FCLKA is only received. FCLKA is routed to a
multiplexer, which allows programming the clock source of the PCI Express External Cable
Interface to be either FCLKA, or an internal differential 100 MHz reference clock.
The
MAMC-XLINK
is always clock master of the PCI Express External Cable Interface, i.e.
the clock is transmitted to the cable interface, but not received from there.
3.5 Cable Interface Control Signals
The PCI Express External Cable Interface implemented on the
MAMC-XLINK
supports the
following Cable Interface control signals:
CPERST#, CPRSNT#, CWAKE#, CPWRON
For definition, usage, sensing, and programming of these control signals please refer to
chapter 6.3 and to the PCI Express External Cable Interface Specification.