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6-17
When you generate digital output signals, the generation pauses as soon as the pause trigger is
asserted. If the source of your sample clock is the onboard clock, the generation resumes as soon
as the pause trigger is deasserted, as shown in Figure 6-9.
Figure 6-9.
DO Pause Trigger with the Onboard Clock Source
If you are using any signal other than the onboard clock as the source of your sample clock, the
generation resumes as soon as the pause trigger is deasserted and another edge of the sample
clock is received, as shown in Figure 6-10.
Figure 6-10.
DO Pause Trigger with Other Signal Source
Using a Digital Source
To use DO Pause Trigger, specify a source and a polarity. The source can be one of the following
signals:
•
PFI <0..15>
•
RTSI <0..7>
•
PXI_STAR
•
PXIe_DSTAR<A,B>
•
Counter
n
Internal Output
•
Counter
n
Gate
•
AI Pause Trigger (ai/PauseTrigger)
•
AO Pause Trigger (ao/PauseTrigger)
•
DI Pause Trigger (di/PauseTrigger)
The source can also be one of several other internal signals on your DAQ device. Refer to
Device
Routing in MAX
in the
NI-DAQmx Help
or the
LabVIEW Help
for more information.
You can also specify whether the samples are paused when DO Pause Trigger is at a logic high
or low level.
P
aus
e Trigger
Sa
mple Clock
P
aus
e Trigger
Sa
mple Clock
Summary of Contents for 6368
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