cDAQ-9185/9189 User Manual
© National Instruments
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ix
Counter Output Applications............................................................................................ 6-24
Simple Pulse Generation .......................................................................................... 6-24
Single Pulse Generation.................................................................................... 6-25
Single Pulse Generation with Start Trigger...................................................... 6-25
Pulse Train Generation ............................................................................................. 6-26
Finite Pulse Train Generation........................................................................... 6-26
Retriggerable Pulse or Pulse Train Generation ................................................ 6-26
Continuous Pulse Train Generation.................................................................. 6-27
Buffered Pulse Train Generation...................................................................... 6-28
Finite Implicit Buffered Pulse Train Generation.............................................. 6-29
Continuous Buffered Implicit Pulse Train Generation..................................... 6-29
Finite Buffered Sample Clocked Pulse Train Generation ................................ 6-29
Continuous Buffered Sample Clocked Pulse Train Generation ....................... 6-31
Frequency Generation............................................................................................... 6-31
Using the Frequency Generator........................................................................ 6-31
Frequency Division................................................................................................... 6-32
Using the Watchdog Timer....................................................................................... 6-32
Pulse Generation for ETS ......................................................................................... 6-32
Counter Timing Signals.................................................................................................... 6-33
Counter
n
Source Signal ........................................................................................... 6-33
Routing a Signal to Counter
n
Source .............................................................. 6-34
Routing Counter
n
Source to an Output Terminal............................................ 6-34
Counter
n
Gate Signal............................................................................................... 6-34
Routing a Signal to Counter
n
Gate.................................................................. 6-35
Routing Counter
n
Gate to an Output Terminal ............................................... 6-35
Counter
n
Aux Signal ............................................................................................... 6-35
Routing a Signal to Counter
n
Aux .................................................................. 6-35
Counter
n
A, Counter
n
B, and Counter
n
Z Signals ................................................ 6-36
Routing Signals to A, B, and Z Counter Inputs................................................ 6-36
Routing Counter
n
Z Signal to an Output Terminal ......................................... 6-36
Counter
n
Up_Down Signal ..................................................................................... 6-36
Counter
n
HW Arm Signal ....................................................................................... 6-36
Routing Signals to Counter
n
HW Arm Input .................................................. 6-36
Counter
n
Sample Clock Signal................................................................................ 6-37
Using an Internal Source .................................................................................. 6-37
Using an External Source ................................................................................. 6-37
Routing Counter
n
Sample Clock to an Output Terminal ................................ 6-37
Counter
n
Internal Output and Counter
n
TC Signals .............................................. 6-38
Routing Counter
n
Internal Output to an Output Terminal .............................. 6-38
Frequency Output Signal .......................................................................................... 6-38
Routing Frequency Output to a Terminal......................................................... 6-38
Default Counter/Timer Routing........................................................................................ 6-38
Other Counter Features..................................................................................................... 6-38
Cascading Counters .................................................................................................. 6-38
Prescaling.................................................................................................................. 6-39
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