© National Instruments
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Finite Pulse Train Generation........................................................................... 7-28
Retriggerable Pulse or Pulse Train Generation ................................................ 7-29
Continuous Pulse Train Generation.................................................................. 7-30
Buffered Pulse Train Generation ...................................................................... 7-31
Finite Implicit Buffered Pulse Train Generation .............................................. 7-31
Continuous Buffered Implicit Pulse Train Generation..................................... 7-32
Finite Buffered Sample Clocked Pulse Train Generation ................................ 7-32
Continuous Buffered Sample Clocked Pulse Train Generation ....................... 7-33
Source Signal ........................................................................................... 7-36
Source .............................................................. 7-37
Source to an Output Terminal............................................ 7-37
Gate Signal............................................................................................... 7-37
Gate.................................................................. 7-38
Gate to an Output Terminal ............................................... 7-38
Aux Signal ............................................................................................... 7-38
Aux .................................................................. 7-38
A, Counter
n
B, and Counter
n
Z Signals ................................................ 7-39
Z Signal to an Output Terminal ......................................... 7-39
Up_Down Signal ..................................................................................... 7-39
HW Arm Signal ....................................................................................... 7-39
n
HW Arm Input .................................................. 7-40
Sample Clock Signal................................................................................ 7-40
Using an Internal Source .................................................................................. 7-40
Using an External Source ................................................................................. 7-41
Routing Counter
Sample Clock to an Output Terminal ................................ 7-41
Internal Output and Counter
n
TC Signals .............................................. 7-41
Internal Output to an Output Terminal .............................. 7-41
Routing Frequency Output to a Terminal......................................................... 7-41
Default Counter/Timer Pins.............................................................................................. 7-42
Counter Triggering ........................................................................................................... 7-45
Other Counter Features..................................................................................................... 7-45
Cascading Counters .................................................................................................. 7-45
Prescaling.................................................................................................................. 7-46
Synchronization Modes ............................................................................................ 7-46
Summary of Contents for DAQ X NI 634 Series
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