National Instruments DAQ X Series, User Manual

Page 1: ...erutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In st...

Page 2: ...ries User Manual NI 632x 634x 635x 636x Devices X Series User Manual ni com manuals Deutsch Fran ais February 2012 370784D 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE...

Page 3: ...rate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 For further support information refer to the Technical Support and Professional Services appendix To comment...

Page 4: ...ntellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software or oth...

Page 5: ...CORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Artisan Technology Group Quality Instrumentation Guaran...

Page 6: ...ation when the product is connected to a test object or if the product is used in residential areas To minimize the potential for the product to cause interference to radio and television reception or...

Page 7: ...y Cable Slot 1 8 Device Pinouts 1 8 Device Specifications 1 8 Device Accessories and Cables 1 8 Chapter 2 DAQ System Overview DAQ Hardware 2 1 DAQ STC3 2 2 Calibration Circuitry 2 3 Cables and Accesso...

Page 8: ...Software 4 6 Multichannel Scanning Considerations 4 6 Analog Input Data Acquisition Methods 4 9 Software Timed Acquisitions 4 10 Hardware Timed Acquisitions 4 10 Analog Input Triggering 4 11 Connecti...

Page 9: ...Signal 4 34 AI Start Trigger Signal 4 35 AI Reference Trigger Signal 4 37 AI Pause Trigger Signal 4 38 Getting Started with AI Applications in Software 4 40 Analog Input on Simultaneous MIO X Series D...

Page 10: ...O Pause Trigger Signal to an Output Terminal 5 10 AO Sample Clock Signal 5 10 Using an Internal Source 5 10 Using an External Source 5 11 Routing AO Sample Clock Signal to an Output Terminal 5 11 Othe...

Page 11: ...ion 6 16 DO Sample Clock Signal 6 17 Using an Internal Source 6 17 Using an External Source 6 17 Routing DO Sample Clock to an Output Terminal 6 18 Other Timing Requirements 6 18 DO Sample Clock Timeb...

Page 12: ...12 Implicit Buffered Semi Period Measurement 7 12 Frequency Measurement 7 13 Low Frequency with One Counter 7 13 High Frequency with Two Counters 7 14 Large Range of Frequencies with Two Counters 7 15...

Page 13: ...ounter n Source 7 42 Routing Counter n Source to an Output Terminal 7 42 Counter n Gate Signal 7 43 Routing a Signal to Counter n Gate 7 43 Routing Counter n Gate to an Output Terminal 7 43 Counter n...

Page 14: ...I O Protection 8 7 Programmable Power Up States 8 7 Chapter 9 Digital Routing and Clock Generation Clock Routing 9 1 100 MHz Timebase 9 2 20 MHz Timebase 9 2 100 kHz Timebase 9 2 External Reference C...

Page 15: ...APFI 0 1 Terminals 11 3 Analog Input Channels 11 3 Analog Input Channels on MIO X Series Devices 11 4 Analog Input Channels on Simultaneous MIO X Series Devices 11 4 Analog Trigger Actions 11 4 Routi...

Page 16: ...USB 6351 6361 Screw Terminal Pinout A 13 Figure A 8 NI USB 6361 Mass Termination Pinout A 14 Figure A 9 NI PCIe 6353 and NI PCIe PXIe 6363 Pinout A 16 Figure A 10 NI USB 6363 Mass Termination Pinout A...

Page 17: ...es you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Electromagnetic Compatibility for information ab...

Page 18: ...ts Select Start All Programs National Instruments NI DAQ NI DAQmx Help LabVIEW If you are a new user use the Getting Started with LabVIEW manual to familiarize yourself with the LabVIEW graphical prog...

Page 19: ...s CVI Help Measurement Studio If you program your NI DAQmx supported device in Measurement Studio using Visual C Visual C or Visual Basic NET you can interactively create channels and tasks by launchi...

Page 20: ...e Help describes the NI DAQmx Library functions which you can use with National Instruments data acquisition devices to develop instrumentation acquisition and control applications Select Start All Pr...

Page 21: ...6 6358 Specifications contains all specifications for the NI 6356 and NI 6358 Simultaneous MIO X Series devices The NI 6361 6363 Specifications contains all specifications for the NI 6361 and NI 6363...

Page 22: ...nuals are available as PDFs You must have Adobe Acrobat Reader with Search and Accessibility 5 0 5 or later installed to view the PDFs Refer to the Adobe Systems Incorporated Web site at www adobe com...

Page 23: ...ng software and hardware configuring channels and tasks and getting started developing an application 3 Installing the hardware Unpack your X Series device as described in the Unpacking section The DA...

Page 24: ...up time This function measures the onboard reference voltage of the device and adjusts the self calibration constants to account for any errors caused by short term fluctuations in the environment You...

Page 25: ...through the chassis ground The wire should be AWG 16 or larger solid copper wire with a maximum length of 1 5 m 5 ft Attach the wire to the earth ground of the facility s power system For more inform...

Page 26: ...he end of the power cable as practical Install the snap on ferrite bead by opening the housing and looping the power cable once through the center of the ferrite Close the ferrite bead until the locki...

Page 27: ...81514 01 not included in your X Series USB device kit Refer to Figure 1 3 1 Use three 8 32 flathead screws to attach the backpanel wall mount to the panel wall Tighten the screws with a 2 Phillips scr...

Page 28: ...f the backpanel wall mount using a 1 Phillips screwdriver and four machine screws part number 740981 01 included in the kit as shown in Figure 1 4 Tighten the screws to a torque of 0 4 N m 3 6 lb in F...

Page 29: ...SB Device LED Patterns section of Chapter 3 Connector and LED Information for information about the X Series USB device READY and ACTIVE LEDs USB Cable Strain Relief NI USB 634x 635x 636x Devices You...

Page 30: ...lock cables Device Pinouts Refer to Appendix A Device Specific Information for X Series device pinouts Device Specifications Refer to the specifications document for your device NI 632x Specification...

Page 31: ...onents of a typical DAQ system Figure 2 1 Components of a Typical DAQ System DAQ Hardware DAQ hardware digitizes signals performs D A conversions to generate analog output signals and measures and con...

Page 32: ...d routing of internal and external timing signals Four flexible 32 bit counter timer modules with hardware gating Digital waveform acquisition and generation Static DIO signals True 5 V high current d...

Page 33: ...lp for more information about using calibration constants For a detailed calibration procedure for X Series devices refer to the B E M S X Series Calibration Procedure by clicking Manual Calibration P...

Page 34: ...4 Analog Input for information about how to select accessories for your X Series device This section describes some cable and accessory options for X Series devices with one or two 68 pin connectors...

Page 35: ...fer to the SCC Configuration Guide available by going to ni com info and entering the Info Code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your...

Page 36: ...es Use RTSI bus cables to connect timing and synchronization signals among PCI PCI Express devices such as X Series M Series CAN and other measurement vision and motion devices Since PXI devices use P...

Page 37: ...and digital sections of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals For more information about the connectors used for DAQ devices refer...

Page 38: ...citation currents or voltages bridge completion linearization or high amplification for proper and accurate operation Therefore most computer based measurement systems include some form of signal cond...

Page 39: ...uiring high speed acquisition Note NI 6356 6358 6366 6368 Devices Simultaneous MIO SMIO X Series devices only support controlling SCXI in parallel mode System features include the following Modular ar...

Page 40: ...evices do not support SCC Programming Devices in Software National Instruments measurement devices are packaged with NI DAQmx driver software an extensive library of functions and VIs you can call fro...

Page 41: ...DAQmx 9 0 and later NI PCIe PXIe 6351 6353 6361 6363 NI DAQmx 9 0 and later NI PXIe 6356 6358 6366 6368 NI DAQmx 9 0 2 and later NI USB 6361 6363 Mass Termination NI DAQmx 9 5 and later NI USB 6366 M...

Page 42: ...PCI Express Device Disk Drive Power Connector and RTSI Connector Pinout sections refer to X Series PCI Express device power and the RTSI connector on PCI Express devices The USB Device LED Patterns s...

Page 43: ...efer to the Connecting Ground Referenced Signal Sources section of Chapter 4 Analog Input Simultaneous MIO X Series Devices For differential measurements on Simultaneous MIO X Series devices AI 0 and...

Page 44: ...o the specifications for your device 5 V D GND Output 5 V Power Source These terminals provide a fused 5 V power source Refer to the 5 V Power Source section for more information PFI 0 7 P1 0 7 PFI 8...

Page 45: ...tall the disk drive power connector in either of the following situations You need more power than listed in the device specifications You are using an SCC accessory without an external power supply s...

Page 46: ...indicates activity over the bus The READY LED indicates whether or not the device is configured Table 3 2 shows the behavior of the LEDs 1 Device Disk Drive Power Connector 2 PC Disk Drive Power Conn...

Page 47: ...es devices Figure 4 1 MIO X Series Analog Input Circuitry The main blocks featured in the MIO X Series device analog input circuitry are as follows I O Connector You can connect analog input signals t...

Page 48: ...al converter ADC digitizes the AI signal by converting the analog voltage into a digital number AI FIFO MIO X Series devices can perform both single and multiple A D conversions of a fixed or infinite...

Page 49: ...smaller input range improves the voltage resolution but may result in the input signal going out of range For more information about setting ranges refer to the NI DAQmx Help or the LabVIEW Help Table...

Page 50: ...ound reference settings Differential mode In DIFF mode the MIO X Series device measures the difference in voltage between two AI signals Referenced single ended mode In RSE mode the MIO X Series devic...

Page 51: ...rating of AI signals with respect to ground and for signal pairs in differential mode with respect to each other are listed in the specifications document for your device Exceeding the maximum input v...

Page 52: ...to the DAQ Assistant Help for more information about the DAQ Assistant To configure the input mode of your voltage measurement using the NI DAQmx C API set the terminalConfig property Refer to the NI...

Page 53: ...f the source connected to channel 1 is high enough the resulting reading of channel 1 can be partially affected by the voltage on channel 0 This effect is referred to as ghosting If your source impeda...

Page 54: ...connect an input channel to ground Then insert this channel in the scan list between two of your signal channels The input range of the grounded channel should match the input range of the signal afte...

Page 55: ...ire 1 000 points from each channel at a scan rate of 500 kS s Both methods take the same amount of time Doubling the number of samples averaged from 500 to 1 000 decreases the effect of noise by a fac...

Page 56: ...single point HWTSP A buffer is a temporary storage in computer memory for to be transferred samples Buffered In a buffered acquisition data is moved from the DAQ device s onboard FIFO memory to a PC b...

Page 57: ...k function provide tight synchronization between the software layer and the hardware layer Refer to the NI Developer Zone document NI DAQmx Hardware Timed Single Point Lateness Checking for more infor...

Page 58: ...nded RSE Refer to the Analog Input Ground Reference Settings section for descriptions of the RSE NRSE and DIFF modes and software considerations Refer to the Connecting Ground Referenced Signal Source...

Page 59: ...ground reference point or return signal The signal leads travel through noisy environments Two analog input channels AI and AI are available for the signal DIFF signal connections reduce noise pickup...

Page 60: ...input signal can share a common reference point AI GND with other signals that use RSE The input signal is high level greater than 1 V The leads connecting the signal to the device are less than 3 m 1...

Page 61: ...impedances this connection leaves the DIFF signal path significantly off balance Noise that couples electrostatically onto the positive line does not couple onto the negative line because it is connec...

Page 62: ...iguration offers slightly better noise rejection but has the disadvantage of loading the source down with the series combination sum of the two resistors If for example the source impedance is 2 k and...

Page 63: ...nt input offset voltage as a result of input bias current typically 100 k to 1 M In this case connect the negative input directly to AI GND If the source has high output impedance balance the signal p...

Page 64: ...urce connected to the DAQ device in NRSE mode Figure 4 8 NRSE Connections for Floating Signal Sources All of the bias resistor configurations discussed in the Using Differential Connections for Floati...

Page 65: ...erenced Single Ended RSE Connections for Floating Signal Sources Figure 4 9 shows how to connect a floating signal source to the MIO X Series device configured for RSE mode Figure 4 9 RSE Connections...

Page 66: ...ement error Follow the connection instructions for grounded signal sources to eliminate this ground potential difference from the measured signal When to Use Differential Connections with Ground Refer...

Page 67: ...pling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With this type of connection the...

Page 68: ...n the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground shown as Vcm in the figure AI and AI must both remain...

Page 69: ...SENSE is internally connected to the negative input of the NI PGIA Therefore the ground point of the signal connects to the negative input of the NI PGIA Any potential difference between the device gr...

Page 70: ...ct AI signals to the device With this type of wire the signals attached to the positive and negative input channels are twisted together and then covered with a shield You then connect this shield onl...

Page 71: ...ock controls the Convert Period which is determined by the following equation 1 Convert Period Convert Rate PFI RTSI PXI_STAR Analog Comparison Event 20 MHz Timebase 100 kHz Timebase PXI_CLK10 Program...

Page 72: ...l pretriggered DAQ sequence AI Start Trigger ai StartTrigger can be either a hardware or software signal If AI Start Trigger is set up to be a software start trigger an output pulse appears on the ai...

Page 73: ...f Chapter 8 PFI for more information Aggregate versus Single Channel Sample Rates MIO X Series devices are characterized with maximum single channel and maximum aggregate sample rates The maximum sing...

Page 74: ...ple Clock AO Sample Clock ao SampleClock DI Sample Clock di SampleClock DO Sample Clock do SampleClock A programmable internal counter divides down the sample clock timebase Several other internal sig...

Page 75: ...ing the AI Pause Trigger signal A counter timing engine on your device internally generates AI Sample Clock unless you select some external source AI Start Trigger starts this counter and either softw...

Page 76: ...0 RTSI 0 7 PFI 0 15 PXI_STAR PXIe DSTAR A B Analog Comparison Event an analog trigger AI Sample Clock Timebase is not available as an output on the I O connector AI Sample Clock Timebase is divided do...

Page 77: ...hout the sample To explicitly specify the conversion rate use AI Convert Clock Rate DAQmx Timing property node or function Caution Setting the conversion rate higher than the maximum rate specified fo...

Page 78: ...red as inputs by default Using a Delay from Sample Clock to Convert Clock When using the AI timing engine to generate your Convert Clock you also can specify a configurable delay from AI Sample Clock...

Page 79: ...wever after the device recognizes an AI Sample Clock pulse it causes an error if it receives an AI Sample Clock pulse before the correct number of AI Convert Clock pulses are received Figures 4 18 4 1...

Page 80: ...n the I O connector AI Hold Complete Event Signal The AI Hold Complete Event ai HoldCompleteEvent signal generates a pulse after each A D conversion begins You can route AI Hold Complete Event out to...

Page 81: ...er can also be configured to be retriggerable The timing engine will generate the sample and convert clocks for the configured acquisition in response to each pulse on an AI Start Trigger signal The t...

Page 82: ...he rising edge or falling edge of AI Start Trigger Using an Analog Source When you use an analog trigger source the acquisition begins on the first rising edge of the Analog Comparison Event signal Ro...

Page 83: ...ion occurs before the DAQ device captures the specified number of pretrigger samples the DAQ device ignores the condition If the buffer becomes full the DAQ device continuously discards the oldest sam...

Page 84: ...ng an Analog Source When you use an analog trigger source the acquisition stops on the first rising edge of the Analog Comparison Event signal Routing AI Reference Trigger Signal to an Output Terminal...

Page 85: ...Trigger ao PauseTrigger DO Pause Trigger do PauseTrigger DI Pause Trigger di PauseTrigger The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX...

Page 86: ...plications through DMA or programmed I O data transfer mechanisms Some of the applications also use start reference and pause triggers Note For more information about programming analog input applicat...

Page 87: ...ies device through the I O connector Refer to Appendix A Device Specific Information for device I O connector pinouts Instrumentation Amplifier NI PGIA The NI programmable gain instrumentation amplifi...

Page 88: ...imum input voltage ratings can be found in the specifications document for each Simultaneous MIO X Series device Analog Input Range Input range refers to the set of input voltages that an analog input...

Page 89: ...e voltage Vcm which is equivalent to subtracting AI 0 x GND from AI 0 x must be less than 10 V This Vcm is a constant for all range selections The signal voltage Vs which is equivalent to subtracting...

Page 90: ...re triggering Hardware timed operations can be buffered or hardware timed single point HWTSP A buffer is a temporary storage in computer memory for to be transferred samples Buffered In a buffered acq...

Page 91: ...the FIFO before it can be transferred to host memory The device generates an error in this case With continuous operations if the user program does not read data out of the PC buffer fast enough to k...

Page 92: ...ns document for your device Connecting Analog Input Signals Table 4 6 summarizes the recommended input configuration for different types of signal sources for Simultaneous MIO X Series devices Refer t...

Page 93: ...cted in some way to the building system ground and is therefore already connected to a common ground point with respect to the device assuming that the computer is plugged into the same power system a...

Page 94: ...Mode Signal Rejection Considerations The instrumentation amplifier can reject any voltage caused by ground potential differences between the signal source and the device In addition the instrumentati...

Page 95: ...eturn path for the bias current A value of 10 k to 100 k is usually sufficient If you do not use the resistors and the source is truly floating the source is not likely to remain within the common mod...

Page 96: ...ion of electrostatically coupled noise This configuration does not load down the source other than the very high input impedance of the instrumentation amplifier You can fully balance the signal path...

Page 97: ...s possible Separate the signal lines of the Simultaneous MIO X Series device from high current or high voltage lines These lines can induce currents in or voltages on the signal lines of the Simultane...

Page 98: ...is received A typical posttrigger DAQ sequence is shown in Figure 4 28 The sample counter is loaded with the specified number of posttrigger samples in this example five The value decrements with eac...

Page 99: ...feature the following analog input timing signals AI Sample Clock Signal AI Sample Clock Timebase Signal AI Hold Complete Event Signal AI Start Trigger Signal AI Reference Trigger Signal AI Pause Tri...

Page 100: ...ernal or external source for AI Sample Clock You also can specify whether the measurement sample begins on the rising edge or falling edge of AI Sample Clock Using an Internal Source One of the follow...

Page 101: ...pulse is always active high All PFI terminals are configured as inputs by default Other Timing Requirements Your DAQ device only acquires data during an acquisition The device ignores AI Sample Clock...

Page 102: ...0 RTSI 0 7 PFI 0 15 PXI_STAR PXIe DSTAR A B Analog Comparison Event an analog trigger AI Sample Clock Timebase is not available as an output on the I O connector AI Sample Clock Timebase is divided do...

Page 103: ...p When a certain number of points are sampled in finite mode After a hardware reference trigger in finite mode With a software command in continuous mode An acquisition that uses a start trigger but n...

Page 104: ...channel is only visible when reading in RAW mode For maximum efficiency in bus bandwidth and onboard FIFO use use an even number of samples per channel or an even number of channels for finite acquis...

Page 105: ...red is the buffer size minus the number of pretrigger samples Note NI USB 6356 6366 Devices You can select the buffer on the host or on the NI USB 6356 6366 device To enable a Reference Trigger to Onb...

Page 106: ...ernal Output DI Reference Trigger di ReferenceTrigger AO Start Trigger ao StartTrigger DO Start Trigger do StartTrigger The source also can be one of several internal signals on your DAQ device Refer...

Page 107: ...can program the active level of the pause trigger to be high or low as shown in Figure 4 33 In the figure T represents the period and A represents the unknown time between the clock pulse and the pos...

Page 108: ...ting Started with AI Applications in Software You can use the Simultaneous MIO X Series device in the following analog input applications Simultaneous sampling Single point analog input Finite analog...

Page 109: ...ent Studio Visual Basic and ANSI C examples refer to the KnowledgeBase document Where Can I Find NI DAQmx Examples by going to ni com info and entering the Info Code daqmxexp For additional examples r...

Page 110: ...s Figure 5 1 X Series Analog Output Circuitry The main blocks featured in the X Series analog output circuitry are as follows DACs Digital to analog converters DACs convert digital codes to analog vol...

Page 111: ...ot described below refer to the specifications for your device NI 6321 6323 634x Devices On NI 6321 6323 634x devices the AO reference is always 10 V So for NI 6321 6323 634x devices the analog output...

Page 112: ...DAC conversion In NI DAQmx software timed generations are referred to as on demand timing Software timed generations are also referred to as immediate or static operations They are typically used for...

Page 113: ...e can be either finite or continuous Finite sample mode generation refers to the generation of a specific predetermined number of data samples Once the specified number of samples has been written out...

Page 114: ...ws and causes an error Analog Output Triggering Analog output supports two different triggering actions Start trigger Pause trigger An analog or digital trigger can initiate these actions All X Series...

Page 115: ...nal Load Load V OUT V OUT AO GND AO 3 Analog Output Channels AO 2 Channel 3 Connector 1 AI 16 31 Channel 2 X Series Device Load Load V OUT V OUT AO GND AO 1 Analog Output Channels X Series Device AO 0...

Page 116: ...onfigured generation in response to each pulse on an AO Start Trigger signal The timing engine ignores the AO Start Trigger signal while the clock generation is in progress After the clock generation...

Page 117: ...signal Refer to the Triggering with an Analog Source section of Chapter 11 Triggering for more information Routing AO Start Trigger Signal to an Output Terminal You can route AO Start Trigger out to...

Page 118: ...oon as the pause trigger is deasserted and another edge of the sample clock is received as shown in Figure 5 6 Figure 5 6 AO PauseTrigger with Other Signal Source Using a Digital Source To use AO Paus...

Page 119: ...ause Trigger Signal to an Output Terminal You can route AO Pause Trigger out to any PFI 0 15 RTSI 0 7 or PXIe DSTARC terminal AO Sample Clock Signal Use the AO Sample Clock ao SampleClock signal to in...

Page 120: ...ger Routing AO Sample Clock Signal to an Output Terminal You can route AO Sample Clock as an active low signal out to any PFI 0 15 RTSI 0 7 or PXIe DSTARC terminal Other Timing Requirements The AO tim...

Page 121: ...e 100 kHz Timebase PXI_CLK10 PFI 0 15 RTSI 0 7 PXI_STAR PXIe DSTAR A B Analog Comparison Event an analog trigger AO Sample Clock Timebase is not available as an output on the I O connector You might u...

Page 122: ...triggers in software refer to the NI DAQmx Help or the LabVIEW Help X Series devices use the NI DAQmx driver NI DAQmx includes a collection of programming examples to help you get started developing a...

Page 123: ...rt 0 Up to 32 lines of DIO Direction and function of each terminal individually controllable Static digital input and output High speed digital waveform generation High speed digital waveform acquisit...

Page 124: ...With a software timed acquisition software controls the rate of the acquisition Software sends a separate command to the hardware to initiate each acquisition In NI DAQmx software timed acquisitions a...

Page 125: ...s onboard FIFO memory to a PC buffer using DMA before it is transferred to application memory Buffered acquisitions typically allow for much faster transfer rates than non buffered acquisitions becaus...

Page 126: ...ation between the software layer and the hardware layer Refer to the NI Developer Zone document NI DAQmx Hardware Timed Single Point Lateness Checking for more information To access this document go t...

Page 127: ...DIO line to be an output a static input or a digital waveform acquisition input X Series devices feature the following digital input timing signals DI Sample Clock Signal DI Sample Clock Timebase Sign...

Page 128: ...arity of the signal The source can be any of the following signals DI Sample Clock di SampleClock DO Sample Clock do SampleClock AI Sample Clock ai SampleClock AI Convert Clock ai ConvertClock AO Samp...

Page 129: ...DI Sample Clock unless you select some external source DI Start Trigger starts this timing engine and either software or hardware can stop it once a finite acquisition completes When using the DI timi...

Page 130: ...tart Trigger Signal Use the DI Start Trigger di StartTrigger signal to begin a measurement acquisition A measurement acquisition consists of one or more samples If you do not use triggers begin a meas...

Page 131: ...source specify a source and an edge The source can be any of the following signals PFI 0 15 RTSI 0 7 Counter n Internal Output PXI_STAR PXIe DSTAR A B Change Detection Event AI Start Trigger ai Start...

Page 132: ...fy a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples that occur after the reference trigger desired i...

Page 133: ...15 RTSI 0 7 PXI_STAR PXIe DSTAR A B Change Detection Event Counter n Internal Output AI Reference Trigger ai ReferenceTrigger AO Start Trigger ao StartTrigger DO Start Trigger do StartTrigger The sou...

Page 134: ...to pause and resume a measurement acquisition The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive You can program the active level of...

Page 135: ...signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using an Analog Source When you use an analog trigger source the internal sample...

Page 136: ...The time between samples can be much shorter The timing between samples can be deterministic Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or hardw...

Page 137: ...are regeneration FIFO regeneration and non regeneration modes Regeneration is the repetition of the data that is already in the buffer Standard regeneration is when data from the PC buffer is continu...

Page 138: ...ory to the DO waveform generation FIFO The DAQ device moves samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal DO Sample Clock You can configure each DIO signa...

Page 139: ...of the following internal signals can drive DO Sample Clock DI Sample Clock di SampleClock DO Sample Clock do SampleClock AI Sample Clock ai SampleClock AI Convert Clock ai ConvertClock AO Sample Cloc...

Page 140: ...delay from DO Start Trigger to the first DO Sample Clock pulse By default this delay is two ticks of DO Sample Clock Timebase Figure 6 7 shows the relationship of DO Sample Clock to DO Start Trigger F...

Page 141: ...r signal to initiate a waveform generation If you do not use triggers you can begin a generation with a software command Retriggerable DO The DO Start Trigger can also be configured to be retriggerabl...

Page 142: ...Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the waveform generation begins on the rising edge or falling edge of DO Start Trigger Using a...

Page 143: ...igger is asserted If the source of your sample clock is the onboard clock the generation resumes as soon as the pause trigger is deasserted as shown in Figure 6 9 Figure 6 9 DO Pause Trigger with the...

Page 144: ...e Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the samples are paused when DO Pause Trigger is at a logic high or low level Using an Analog...

Page 145: ...sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States At system startup and reset the hardware sets all PFI...

Page 146: ...e The DAQ devices synchronize each DI signal to the 100 MHz Timebase and then sends the signal to the change detectors The circuitry ORs the output of all enabled change detectors from every DI signal...

Page 147: ...ignal to a counter you also can capture the relative time between bus changes You also can use the Change Detection Event signal to trigger DO or counter generations Digital Filtering You can enable a...

Page 148: ...in the bus will hold state until the bus becomes stable However each individual line will only wait one extra filter tick before changing This prevents a noisy line from holding a valid transition in...

Page 149: ...ock edge as shown in Figure 6 13 Figure 6 13 Case 1 Case 2 If an additional line on the bus also has a transition during the filter clock period the change is not propagated until the next filter cloc...

Page 150: ...n the device is reset or the computer is restarted The expiration signal that indicates an expired watchdog will continue to assert until the watchdog is disarmed After the watchdog timer expires the...

Page 151: ...al input and P1 4 7 configured for digital output Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch shown in the figure Digita...

Page 152: ...s devices use the NI DAQmx driver NI DAQmx includes a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You...

Page 153: ...r information about connecting counter signals refer to the Default Counter Timer Pinouts section Each counter has a FIFO that can be used for buffered acquisition and generation Each counter also con...

Page 154: ...ck DI Start Trigger DO Sample Clock CTR n Internal Output Freq Out PFI 0 15 PXI_Trig 0 7 PXIe DSTAR A B Change Detection Event Analog Comparison Event Not all timed counter operations require a sample...

Page 155: ...n configure the counter to count rising or falling edges on its Source input You also can control the direction of counting up or down as described in the Controlling the Direction of Counting section...

Page 156: ...2 Single Point On Demand Edge Counting You also can use a pause trigger to pause or gate the counter When the pause trigger is active the counter ignores edges on its Source input When the pause trigg...

Page 157: ...or falling edge of the sample clock Figure 7 4 shows an example of buffered edge counting Notice that counting begins when the counter is armed which occurs before the first active edge on Sample Clo...

Page 158: ...counter is armed while a pulse train is in progress If a counter is armed while the pulse is in the active state it will wait for the next transition to the active state to begin the measurement Refe...

Page 159: ...ulses The counter counts the number of edges on the Source input while the Gate input remains active On each trailing edge of the Gate signal the counter stores the count in the counter FIFO A DMA con...

Page 160: ...re 7 7 shows an example of a sample clocked buffered pulse width measurement Figure 7 7 Sample Clocked Buffered Pulse Width Measurement Hardware Timed Single Point Pulse Width Measurement A hardware t...

Page 161: ...o edges of the Gate signal You can calculate the high and low time of the Gate input by multiplying the period of the Source signal by the number of edges returned by the counter Refer to the followin...

Page 162: ...shows an example of an implicit buffered pulse measurement Figure 7 9 Implicit Buffered Pulse Measurement Sample Clocked Buffered Pulse Measurement A sample clocked buffered pulse measurement is simi...

Page 163: ...hardware pulse measurement and semi period are the same measurement Both measure the high and low times of a pulse The functional difference between the two measurements is how the data is returned I...

Page 164: ...ing sections for more information about X Series semi period measurement options Single Semi Period Measurement Implicit Buffered Semi Period Measurement Refer to the Pulse versus Semi Period Measurem...

Page 165: ...ers Large Range of Frequencies with Two Counters Sample Clocked Buffered Frequency Measurement Hardware Timed Single Point Frequency Measurement Low Frequency with One Counter For low frequency measur...

Page 166: ...paired with Counter 3 In this method you route a pulse of known duration T to the Gate of a counter You can generate the pulse using a second counter You also can generate the pulse externally and con...

Page 167: ...l to measure You then measure the long pulse with a known timebase The X Series device can measure this long pulse more accurately than the faster input signal Note Counter 0 is always paired with Cou...

Page 168: ...ment Sample clocked buffered point frequency measurements can either be a single frequency measurement or an average between sample clocks Use CI Freq EnableAveraging to set the behavior For buffered...

Page 169: ...returns the frequency of the pulse just before the sample clock This single measurement is a single frequency measurement and is not an average between clocks Figure 7 16 Sample Clocked Buffered Freq...

Page 170: ...ons Choosing a Method for Measuring Frequency The best method to measure frequency depends on several factors including the expected frequency of the signal to measure the desired accuracy how many co...

Page 171: ...r the source frequency fk but the divide down means that the measurement time is the period of the divided down signal or N fx where N is the divide down Sample clocked For sample clocked frequency me...

Page 172: ...two counter large range measurements For another example Table 7 4 shows the results for 5 MHz Table 7 3 50 kHz Frequency Measurement Methods Variable Sample Clocked One Counter Two Counter High Frequ...

Page 173: ...frequency increases High frequency measurements with two counters is accurate for high frequency signals However the accuracy decreases as the frequency of the signal to measure decreases At very low...

Page 174: ...ts Gate input signal after the counter is armed You can configure the counter to measure the period between two rising edges or two falling edges of the Gate input signal You can route an internal or...

Page 175: ...X Series position measurement options Measurements Using Quadrature Encoders Measurements Using Two Pulse Encoders Buffered Sample Clock Position Measurement Measurements Using Quadrature Encoders The...

Page 176: ...ecified phase of the quadrature cycle You can program this reload to occur in any one of the four phases in a quadrature cycle Channel Z behavior when it goes high and how long it stays high differs w...

Page 177: ...ach rising edge of channel B as shown in Figure 7 22 Figure 7 22 Measurements Using Two Pulse Encoders For information about connecting counter signals refer to the Default Counter Timer Pinouts secti...

Page 178: ...ingle point HWTSP operations For information about connecting counter signals refer to the Default Counter Timer Pinouts section Two Signal Edge Separation Measurement Two signal edge separation measu...

Page 179: ...eparation Measurement Implicit Buffered Two Signal Edge Separation Measurement Sample Clocked Buffered Two Signal Separation Measurement Hardware Timed Single Point Two Signal Separation Measurement S...

Page 180: ...Figure 7 25 Implicit Buffered Two Signal Edge Separation Measurement Sample Clocked Buffered Two Signal Separation Measurement A sample clocked buffered two signal separation measurement is similar t...

Page 181: ...tion measurement Refer to the Sample Clocked Buffered Two Signal Separation Measurement section for more information Note If an active edge on the Gate and an active edge on the AUX does not occur bet...

Page 182: ...t a single pulse The pulse appears on the Counter n Internal Output signal of the counter You can specify a delay from when the counter is armed to the beginning of the pulse The delay is measured in...

Page 183: ...ses once the counter ignores the Gate input Figure 7 28 shows a generation of a pulse with a pulse delay of four and a pulse width of three using the rising edge of Source Figure 7 28 Single Pulse Gen...

Page 184: ...Initial Delay Four Pulses In Legacy Mode this counter operation requires two counters and does not use the embedded counter For example to generate four pulses on Counter 0 Counter 0 generates the pu...

Page 185: ...leInitalDelayOnRetrigger property The default for a single pulse is True while the default for finite pulse trains is False The counter ignores the Gate input while a pulse generation is in progress A...

Page 186: ...to the beginning of the pulse train The delay is measured in terms of a number of active edges of the Source input You specify the high and low pulse widths of the output signal The pulse widths are...

Page 187: ...active time of your generation on each sample clock edge Idle time and active time can also be defined in terms of frequency and duty cycle or idle ticks and active ticks Note On buffered implicit pul...

Page 188: ...Finite Buffered Sample Clocked Pulse Train Generation This function generates a predetermined number of pulse train updates Each point you write defines pulse specifications that are updated with each...

Page 189: ...n out New data can be written to the PC buffer at any time without disrupting the output With FIFO regeneration the entire buffer is downloaded to the FIFO and regenerated from there Once the data is...

Page 190: ...he next sample specifications Frequency Generation You can generate a frequency by using a counter in pulse train generation mode or by using the frequency generator circuit as described in the Using...

Page 191: ...terminals are set to high impedance at startup The FREQ OUT signal also can be routed to many internal timing signals In software program the frequency generator as you would program one of the count...

Page 192: ...hermore suppose you specify the delay increment to be 10 On the first trigger your pulse delay will be 100 on the second it will be 110 on the third it will be 120 the process will repeat in this mann...

Page 193: ...n this section n refers to the X Series Counter 0 1 2 or 3 For example Counter n Source refers to four signals Counter 0 Source the source input to Counter 0 Counter 1 Source the source input to Count...

Page 194: ...Some of these options may not be available in some driver software Routing Counter n Source to an Output Terminal You can route Counter n Source out to any PFI 0 15 RTSI 0 7 or PXIe DSTARC terminal Al...

Page 195: ...e Clock ao SampleClock DI Sample Clock di SampleClock DI Reference Trigger di ReferenceTrigger DO Sample Clock do SampleClock PXI_STAR PXIe DSTAR A B Change Detection Event Analog Comparison Event In...

Page 196: ...e in some driver software Counter n A Counter n B and Counter n Z Signals Counter n B can control the direction of counting in edge counting applications Use the A B and Z inputs to each counter when...

Page 197: ...e routes the Arm Start Trigger to the Counter n HW Arm input of the counter Routing Signals to Counter n HW Arm Input Any of the following signals can be routed to the Counter n HW Arm input RTSI 0 7...

Page 198: ...utput Several other internal signals can be routed to Counter n Sample Clock through internal routes Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using...

Page 199: ...Internal Output to any PFI 0 15 RTSI 0 7 or PXIe DSTARC terminal All PFIs are set to high impedance at startup Frequency Output Signal The Frequency Output FREQ OUT signal is the output of the frequen...

Page 200: ...PFI 9 CTR 0 B 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTR 1 Z 41 PFI 4 CTR 1 B 46 PFI 11 CTR 2 SRC 11 PFI 0 CTR 2 GATE 10 PFI 1 CTR 2...

Page 201: ...B 85 PFI 10 CTR 1 SRC 76 PFI 3 CTR 1 GATE 77 PFI 4 CTR 1 AUX 87 PFI 11 CTR 1 OUT 91 PFI 13 CTR 1 A 76 PFI 3 CTR 1 Z 77 PFI 4 CTR 1 B 87 PFI 11 CTR 2 SRC 73 PFI 0 CTR 2 GATE 74 PFI 1 CTR 2 AUX 75 PFI 2...

Page 202: ...m start trigger the arm start trigger source is routed to the Counter n HW Arm signal Start Trigger For counter output operations a start trigger can be configured to begin a finite or continuous puls...

Page 203: ...small simple counter that counts to eight or two and rolls over This counter can run faster than the larger counters which simply count the rollovers of this smaller counter Thus the prescaler acts a...

Page 204: ...MHz Source Mode In 100 MHz source mode the device synchronizes signals on the rising edge of the source and counts on the third rising edge of the source Edges are pipelined so no counts are lost as s...

Page 205: ...gnal by delaying the Source signal by several nanoseconds The device synchronizes signals on the rising edge of the delayed Source signal and counts on the following rising edge of the source as shown...

Page 206: ...for AI AO DI DO or counter timer functions A timing output signal from AI AO DI DO or counter timer functions Each PFI input also has a programmable debouncing filter Figure 8 1 shows the circuitry of...

Page 207: ...32x 634x 6351 6353 6361 6363 Devices AI Convert Clock ai ConvertClock AI Sample Clock ai SampleClock AI Start Trigger ai StartTrigger AI Reference Trigger ai ReferenceTrigger AI Pause Trigger ai Pause...

Page 208: ...gger ao StartTrigger AO Pause Trigger ao PauseTrigger DI Sample Clock di SampleClock DI Start Trigger di StartTrigger DI Reference Trigger di ReferenceTrigger DI Pause Trigger di PauseTrigger DO Sampl...

Page 209: ...gital changes The values on the PFI lines cannot be read in a hardware timed task but they can be used to fire the change detection event For example if you wanted to do change detection on eight time...

Page 210: ...example of low to high transitions of the input signal High to low transitions work similarly Assume that an input terminal has been low for a long time The input terminal then changes from low to hig...

Page 211: ...does not use the filtered version of the input signal Table 8 1 Filters Filter Setting Filter Clock N Filter Clocks Needed to Pass Signal Pulse Width Guaranteed to Pass Filter Pulse Width Guaranteed t...

Page 212: ...sitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States At system startup and reset the hardware sets all PFI and...

Page 213: ...uisitions and generations These signals can come from the following sources Your X Series device Other devices in your system through RTSI User input through the PFI terminals User input through the P...

Page 214: ...erate many of the AI and AO timing signals The 100 kHz Timebase also can be used as the Source input to the 32 bit general purpose counter timers The 100 kHz Timebase is generated by dividing down the...

Page 215: ...ividing down the onboard oscillator Synchronizing Multiple Devices Refer to the following sections for information about synchronizing multiple X Series devices PXI Express Devices On PXI Express syst...

Page 216: ...ignals All devices including the initiator device receive the 10 MHz reference clock from PFI This signal becomes the external reference clock A PLL on each device generates the internal timebases syn...

Page 217: ...seven DAQ devices in the system USB devices do not support the RTSI bus RTSI Connector Pinout NI PCIe 632x 634x 635x 636x Devices Figure 9 2 shows the RTSI connector pinout and Table 9 1 describes the...

Page 218: ...AO Pause Trigger ao PauseTrigger DI Start Trigger di StartTrigger DI Sample Clock di SampleClock DI Pause Trigger di PauseTrigger DI Reference Trigger di ReferenceTrigger DO Start Trigger do StartTri...

Page 219: ...e AO Start Trigger ao StartTrigger AO Sample Clock ao SampleClock AO Sample Clock Timebase ao SampleClockTimebase AO Pause Trigger ao PauseTrigger Counter input signals for all counters Source Gate Au...

Page 220: ...10 The PXI Express backplane is responsible for generating PXIe_SYNC100 independently to each peripheral slot in a PXI Express chassis For more information refer to the PXI Express Specification at ww...

Page 221: ...TAR from a Star Trigger controller PXI_STAR can be used as an external source for many AI AO and counter signals An X Series device is not a Star Trigger controller An X Series device can be used in t...

Page 222: ...tion at www pxisa org Table 9 2 PXIe DSTAR Line Descriptions Trigger Line Purpose PXIe_DSTARA Distributes high speed high quality clock signals from the system timing slot to the peripherals input PXI...

Page 223: ...Memory Access DMA DMA is a method to transfer data between the device and computer memory without the involvement of the CPU This method makes DMA the fastest available data transfer method NI uses D...

Page 224: ...O is typically used in software timed on demand operations Refer to the Analog Output Data Generation Methods section of Chapter 5 Analog Output for more information USB Device Data Transfer Methods...

Page 225: ...XI_STAR Filters PXIe DSTAR A C PXIe_CLK100 and PXIe_SYNC100 sections of Chapter 9 Digital Routing and Clock Generation for more information about PXI and PXI Express clock and trigger signals PXI Expr...

Page 226: ...of Chapter 5 Analog Output The Counter Triggering section of Chapter 7 Counters Note Not all X Series devices support analog triggering For more information about triggering compatibility refer to the...

Page 227: ...eries devices can generate a trigger on an analog signal To find your device triggering options refer to the specifications document for your device Figure 11 2 shows the analog trigger circuit on MIO...

Page 228: ...cted they are susceptible to crosstalk from adjacent terminals which can cause false triggering Note that the APFI 0 1 terminals also can be used for other functions such as the AO External Reference...

Page 229: ...analog reference or pause trigger and the analog channel is the source of the trigger there can be only one channel in the channel list Analog Input Channels on Simultaneous MIO X Series Devices With...

Page 230: ...er circuitry to detect when the analog signal is below or above a level you specify In below level analog triggering mode shown in Figure 11 4 the trigger is generated when the signal value is less th...

Page 231: ...ection circuitry is the internal Analog Comparison Event signal as shown in Figure 11 6 Figure 11 6 Analog Edge Triggering with Hysteresis Rising Slope Example Analog Edge Trigger with Hysteresis Fall...

Page 232: ...setting the window Top value and the window Bottom value Figure 11 8 demonstrates a trigger that asserts when the signal enters the window Figure 11 8 Analog Window Triggering Mode Entering Window Ana...

Page 233: ...nal before driving the analog trigger circuitry If you configure the AI channel to have a small input range you can trigger on very small voltage changes in the input signal Software calibrate the ana...

Page 234: ...e and accessory choices and other information for the following X Series devices NI 6320 NI 6321 6341 NI 6323 6343 NI 6351 6361 NI 6353 6363 NI 6356 6366 NI 6358 6368 To obtain documentation for devic...

Page 235: ...the NI PCIe 6320 device NI 6320 Pinout Figure A 1 shows the pinout of the NI PCIe 6320 device For a detailed description of each signal refer to the I O Connector Signal Descriptions section of Chapt...

Page 236: ...P2 3 P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND NC NC AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI...

Page 237: ...iled information about the NI 6320 device NI 6320 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of...

Page 238: ...CIe PXIe 6341 and NI USB 6341 devices NI 6321 6341 Pinouts Figure A 2 shows the pinout of the NI PCIe 6321 and NI PCIe PXIe 6341 devices For a detailed description of each signal refer to the I O Conn...

Page 239: ...3 P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D G...

Page 240: ...cessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information...

Page 241: ...3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9...

Page 242: ...ermination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecti...

Page 243: ...I GND NC AI GND AO 3 AO GND AI 16 AI 16 AI 24 AI 16 AI GND AI 17 AI 17 AI 25 AI 17 AI GND AI 18 AI 18 AI 26 AI 18 AI GND AI 19 AI 19 AI 27 AI 19 AI GND AI SENSE 2 AI GND AO 2 AO GND 33 34 35 36 37 38...

Page 244: ...e NI DAQmx Help or the LabVIEW Help NI 6323 6343 Specifications Refer to the NI 632x Specifications for more detailed information about the NI 6323 device Refer to the NI 634x Specifications for more...

Page 245: ...2 D GND PFI 10 P2 2 PFI 11 P2 3 P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI...

Page 246: ...DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help 17 18 19 20 21 22 23 24...

Page 247: ...6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GN...

Page 248: ...s in the NI DAQmx Help or the LabVIEW Help NI 6351 6361 Specifications Refer to the NI 6351 6353 Specifications for more detailed information about the NI 6351 device Refer to the NI 6361 6363 Specifi...

Page 249: ...D GND P0 6 P0 1 D GND P0 4 APFI 0 AO 1 AO 0 AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61...

Page 250: ...Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connect...

Page 251: ...31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 D GND D GND P0 24 P0 23 P...

Page 252: ...Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connect...

Page 253: ...ND AI 23 AI 23 AI 31 AI 23 AI GND APFI 1 AI GND AO 3 AO GND AI 16 AI 16 AI 24 AI 16 AI GND AI 17 AI 17 AI 25 AI 17 AI GND AI 18 AI 18 AI 26 AI 18 AI GND AI 19 AI 19 AI 27 AI 19 AI GND AI SENSE 2 AI GN...

Page 254: ...DAQmx Help or the LabVIEW Help NI 6353 6363 Specifications Refer to the NI 6351 6353 Specifications for more detailed information about the NI 6353 device Refer to the NI 6361 6363 Specifications for...

Page 255: ...3 P1 3 PFI 2 P1 2 D GND PFI 10 P2 2 PFI 11 P2 3 P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI 7 GND AI 7 AI 6 AI 5 GND AI 5 AI 4 NC AI 3 AI 2 GND AI 2 AI 1 AI 0 GND AI 0 PFI 14 P2 6 PFI 9 P2...

Page 256: ...Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connect...

Page 257: ...AO GND AI 7 GND AI 7 AI 6 AI 5 GND AI 5 AI 4 NC AI 3 AI 2 GND AI 2 AI 1 AI 0 GND AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5...

Page 258: ...nter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Hel...

Page 259: ...er to the NI 6366 6368 Specifications for more detailed information about the NI 6366 device NI 6356 6366 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your D...

Page 260: ...APFI 0 AO 1 AO 0 AI 7 AI 6 GND AI 6 AI 5 AI 4 GND AI 4 AI 3 GND AI 3 AI 2 AI 1 GND AI 1 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17...

Page 261: ...e NI DAQmx Help or the LabVIEW Help NI 6358 6368 Specifications Refer to the NI 6356 6358 Specifications for more detailed information about the NI 6358 device Refer to the NI 6366 6368 Specifications...

Page 262: ...in for each high impedance source before connecting to an X Series device Otherwise you must decrease the sample rate for each channel Another common cause of channel crosstalk is due to sampling amon...

Page 263: ...Series device to sample the AI channel s MIO X Series devices use AI Sample Clock ai SampleClock and AI Convert Clock ai ConvertClock to perform interval sampling As Figure B 1 shows AI Sample Clock c...

Page 264: ...ges The largest glitches occur when the most significant bit of the DAC code changes You can build a lowpass deglitching filter to remove some of these glitches depending on the frequency and nature o...

Page 265: ...ervice Program Membership This program entitles members to direct access to NI Applications Engineers via phone and email for one to one technical support as well as exclusive access to eLearning trai...

Page 266: ...urer s declaration of conformity This system affords the user protection for electromagnetic compatibility EMC and product safety You can obtain the DoC for your product by visiting ni com certificati...

Page 267: ...0 9 micro 10 6 m milli 10 3 k kilo 103 M mega 106 Symbols Percent Positive of or plus Negative of or minus Plus or minus Less than Greater than Less than or equal to Greater than or equal to Per Degre...

Page 268: ...n discrete steps analog trigger A trigger that occurs at a user selected point on an incoming analog signal Triggering can be set to occur at a specific level on either an increasing or a decreasing s...

Page 269: ...nd or controlled impedance applications buffer 1 Temporary storage for acquired or generated data 2 A memory device that stores intermediate data between two devices bus buses The group of electrical...

Page 270: ...evant specification for systems having a balanced or differential input common mode signal 1 Any voltage present at the instrumentation amplifier inputs with respect to amplifier ground 2 The signal r...

Page 271: ...cards and DAQPad devices which connect to a computer USB port SCXI modules are considered DAQ devices DAQ STC3 Third generation data acquisition system timing controller chip data acquisition The gen...

Page 272: ...here the values are set and held or rarely change Dynamic digital I O refers to digital systems where the signals are continuously changing often at multi MHz clock rates digital trigger A TTL level s...

Page 273: ...iseconds in some cases During this time data accumulates in the FIFO for future retrieval With a larger FIFO longer latencies can be tolerated In the case of analog output a FIFO permits faster update...

Page 274: ...surrounding earth Normally a noncurrent carrying circuit intended for safety 3 A common reference point for an electrical system H hardware triggering A form of triggering where you set the start tim...

Page 275: ...owing hardware software and the user For example hardware interfaces connect two other pieces of hardware IOH Current output high IOL Current output low K kS 1 000 samples L LabVIEW A graphical progra...

Page 276: ...rame SCXI and PXI devices are modules monotonicity A characteristic of a DAC in which the analog output always increases as the values of the digital code input to it increase multichannel Pertaining...

Page 277: ...ingle Ended mode All measurements are made with respect to a common NRSE measurement system reference but the voltage at this reference can vary with respect to the measurement system ground O offset...

Page 278: ...de deviates from zero for a short period of time pulse width The time from the rising to the falling slope of a pulse at 50 amplitude PXI Express PCI Express eXtensions for Instrumentation The PXI imp...

Page 279: ...stem or a ground Also called a grounded measurement system RTSI bus Real Time System Integration bus The National Instruments timing bus that connects DAQ devices directly by means of connectors on to...

Page 280: ...ser oriented function such as accounting program development measurement or data acquisition In contrast operating system functions basically perform the generic housekeeping of the machine which is i...

Page 281: ...nsducer A device that responds to a physical stimulus heat light sound pressure motion flow and so on and produces a corresponding electrical signal See also sensor trigger 1 Any event that causes or...

Page 282: ...t low Vin Volts in Vm Measured voltage VOH Volts output high VOL Volts output low Vout Volts out Vs Signal source voltage virtual channel See channel W waveform 1 The plot of the instantaneous amplitu...

Page 283: ...MIO X Series devices 4 45 hardware timed MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 44 on demand MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 44 software timed MIO...

Page 284: ...le channels B 1 differential troubleshooting B 1 ghost voltages when sampling multiple channels B 1 MIO X Series devices 4 1 AI Convert Clock 4 31 AI Convert Clock Timebase 4 34 AI Hold Complete Event...

Page 285: ...ation xx AO FIFO 5 1 AO Pause Trigger signal 5 8 AO reference selection 5 2 AO reference selection settings 5 2 AO Sample Clock 5 2 AO Sample Clock signal 5 10 AO Sample Clock Timebase signal 5 12 AO...

Page 286: ...MIO X Series devices 4 48 signal rejection considerations differential ground referenced signals Simultaneous MIO X Series devices 4 48 configuring AI ground reference settings in software MIO X Seri...

Page 287: ...nter n Aux signal 7 43 Counter n B signal 7 44 Counter n Gate signal 7 43 Counter n HW Arm signal 7 45 Counter n Internal Output signal 7 47 Counter n Sample Clock signal 7 45 Counter n Source signal...

Page 288: ...4 DI Sample Clock signal 6 6 di SampleClock 6 6 diagnostic tools NI resources C 1 DIFF connections using with floating signal sources MIO X Series devices 4 15 using with ground referenced signal sour...

Page 289: ...Sample Clock signal 6 17 do SampleClock 6 17 documentation conventions used in manual xvii NI resources C 1 related documentation xviii double buffered acquisition MIO X Series devices 4 10 Simultane...

Page 290: ...or ETS 7 40 pulse train 7 31 retriggerable single pulse 7 33 simple pulse 7 30 single pulse 7 30 single pulse with start trigger 7 31 software timed 5 3 6 14 getting started 1 1 AI applications in sof...

Page 291: ...Terminal pinout A 13 NI USB 6353 6363 pinout A 20 NI USB 6356 6366 pinout A 25 I O protection 6 23 8 7 implicit buffered pulse width measurement 7 7 semi period measurement 7 12 improving analog trigg...

Page 292: ...2 specifications A 4 NI 6321 6341 A 5 accessory options A 7 cabling options A 7 PCI Express pinout A 5 PXI Express pinout A 5 specifications A 7 USB pinout A 7 NI 6323 6343 A 8 accessory options A 11...

Page 293: ...Series devices 4 10 Simultaneous MIO X Series devices 4 44 order of channels for scanning MIO X Series devices 4 7 other software installing 1 1 output signal glitches B 3 minimizing 5 3 terminal rout...

Page 294: ...ty 10 3 clock 10 3 clock and trigger signals 9 8 considerations 10 3 PXIe_CLK100 9 8 PXIe_SYNC100 9 8 PXIe DSTAR A C 9 9 PXI_CLK10 9 8 PXI_STAR filters 9 9 trigger 9 9 PXIe_CLK100 9 8 PXIe_SYNC100 9 8...

Page 295: ...nnections analog input Simultaneous MIO X Series devices 4 46 signal descriptions 3 1 signal routing RTSI bus 9 4 signal sources floating MIO X Series devices 4 13 Simultaneous MIO X Series devices 4...

Page 296: ...unting 7 4 pulse generation 7 30 retriggerable 7 33 with start trigger 7 31 pulse width measurement 7 6 semi period measurement 7 12 two signal edge separation measurement 7 27 single ended connection...

Page 297: ...se 7 50 PXI 9 8 PXI_STAR 9 9 Star Trigger 9 9 start 7 50 triggering 11 1 analog accuracy 11 8 analog actions 11 4 analog edge 11 5 analog edge with hysteresis 11 6 analog input MIO X Series devices 4...

Page 298: ...disk drive power connector PCI Express 3 4 W waveform generation digital 6 16 signals 5 6 Web resources C 1 wiring Simultaneous MIO X Series devices 4 51 working voltage range Simultaneous MIO X Seri...

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