Chapter 4
Connecting Signals
4-28
ni.com
Figure 4-20.
CONVERT* Output Signal Timing
The SI2 counter on the NI 6013/6014 normally generates CONVERT*
unless you select some external source. The counter is started by the
STARTSCAN signal and continues to count down and reload itself until
the scan is finished. It then reloads itself in preparation for the next
STARTSCAN pulse.
A/D conversions generated by either an internal or external CONVERT*
signal are inhibited unless they occur within a DAQ sequence. Scans
occurring within a DAQ sequence may be gated by either the hardware
(AIGATE) signal or software command register gate.
AIGATE Signal
Any PFI pin can externally input the AIGATE signal, which is not
available as an output on the I/O connector. AIGATE can mask off scans
in a DAQ sequence. You can configure the PFI pin you select as the source
for AIGATE in level-detection mode. You can configure the polarity
selection for the PFI pin for either active high or active low. In
level-detection mode if AIGATE is active, the STARTSCAN signal is
masked off and no scans can occur.
AIGATE can neither stop a scan in progress nor continue a previously
gated-off scan; in other words, once a scan has started, AIGATE does not
gate off conversions until the beginning of the next scan and, conversely,
if conversions are being gated off, AIGATE does not gate them back on
until the beginning of the next scan.
t
w
= 50 to 150 ns
t
w
