Chapter 5
Analog Output
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National Instruments Corporation
5-11
Other Timing Requirements
A counter on your device internally generates ao/SampleClock unless you
select some external source. ao/StartTrigger starts the counter and either the
software or hardware can stop it once a finite generation completes. When
using an internally generated ao/SampleClock, you also can specify a
configurable delay from ao/StartTrigger to the first ao/SampleClock pulse.
By default, this delay is two ticks of ao/SampleClockTimebase.
Figure 5-6 shows the relationship of ao/SampleClock to ao/StartTrigger.
Figure 5-6.
ao/SampleClock and ao/StartTrigger
AO Sample Clock Timebase Signal
The AO Sample Clock Timebase (ao/SampleClockTimebase) signal is
divided down to provide a source for ao/SampleClock.
You can route any of the following signals to be the AO Sample Clock
Timebase (ao/SampleClockTimebase) signal:
•
20 MHz Timebase
•
100 kHz Timebase
•
PXI_CLK10
•
PFI <0..15>
•
RTSI <0..7>
•
PXI_STAR
•
Analog Comparison Event (an analog trigger)
ao/SampleClockTimebase is not available as an output on the I/O
connector.
ao/SampleClockTimebase
ao/StartTrigger
ao/SampleClock
Delay
From
Start
Trigger