Chapter 4
Analog Input
©
National Instruments Corporation
4-31
ai/SampleClockTimebase is not available as an output on the I/O connector.
ai/SampleClockTimebase is divided down to provide one of the possible
sources for ai/SampleClock. You can configure the polarity selection for
ai/SampleClockTimebase as either rising or falling edge.
AI Convert Clock Signal
Use the AI Convert Clock (ai/ConvertClock) signal to initiate a single A/D
conversion on a single channel. A sample (controlled by the AI Sample
Clock) consists of one or more conversions.
You can specify either an internal or external signal as the source of
ai/ConvertClock. You also can specify whether the measurement sample
begins on the rising edge or falling edge of ai/ConvertClock.
With NI-DAQmx 7.4 and later, the driver chooses the fastest conversion
rate possible based on the speed of the A/D converter and adds 10 µs of
padding between each channel to allow for adequate settling time. This
scheme enables the channels to approximate simultaneous sampling and
still allow for adequate settling time. If the AI Sample Clock rate is too fast
to allow for this 10 µs of padding, NI-DAQmx chooses the conversion rate
so that the AI Convert Clock pulses are evenly spaced throughout the
sample.
With NI-DAQmx 7.3, the driver chooses a conversion rate so the AI
Convert Clock pulses are evenly spaced throughout the sample. This allows
for the maximum settling time between conversions. To approximate
simultaneous sampling, manually increase the conversion rate.
To explicitly specify the conversion rate, use
AI Convert Clock Rate
DAQmx Timing
property node or function.
Caution
Setting the conversion rate higher than the maximum rate specified for your
device will result in errors.