Chapter 3
Signal Connections
3-2
ni.com
consec
u
tive rising edges of the filter clock. The freq
u
ency of the filter clock
timebase determines whether a transition in the signal may propagate or
not. The f
u
nction of the internal sampling clock is to increase the sampling
rate and prevent aliasing. Fig
u
re 3-1 demonstrates the f
u
nction of this filter.
Figure 3-1.
Digital Filtering
In period A, the filter blocks the glitches beca
u
se the external signal does
not remain steadily high from one rising edge of the filter clock to the next.
In period B, the filter passes the transition beca
u
se the external signal
remains steadily high. Depending on when the transition occ
u
rs, the filter
may req
u
ire
u
p to two filter clocks—one f
u
ll filter interval—to pass a
transition. The fig
u
re shows a rising (0 to 1) transition. The same filtering
applies to falling (1 to 0) transitions.
Note
The effect of filtering is that the signal transition is shifted by a minim
u
m of
one filter clock and a maxim
u
m of two filter clocks.
The filter is sensitive to the d
u
ration for which a digital signal transitions
from one state to another. If a sq
u
are wave is applied to the filter, its
propagation will depend on its freq
u
ency and d
u
ty cycle.
There are fo
u
r filter settings available in the TIO devices: 5
μ
s, 1
μ
s, 500 ns,
and 100 ns. The 5
μ
s filter will pass all p
u
lse widths (high and low) that are
5
μ
s or longer. It will block all p
u
lse widths that are 2.5
μ
s (one-half of
5
μ
s) or shorter. P
u
lse widths between 2.5
μ
s and 5
μ
s may or may not pass,
depending on the phase of the p
u
lse with respect to the filter clock
timebase. The same relationship extends to all other filter clocks.
In addition to these hard-wired filter clocks, yo
u
can
u
se any PFI, RTSI, or
internal signal as the so
u
rce for the filter clock timebase. Use signals with
a d
u
ty cycle as close to 50 percent as possible.
If the period of the filter clock timebase is t
fltrclk
, this filter g
u
arantees to
pass p
u
lse widths that are 2*t
fltrclk
or longer and to block p
u
lse widths that
External Signal
on PFI Line
External Signal Sample
by Maximum Timebase
L
H L
H H
Filtered PFI Line
Maximum Timebase
Filter Clock
H
H H
H H
A
B