Chapter 1
Introduction
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User-Defined I/O Resources
You can create your own custom measurements using the fixed I/O
resources. For example, one application might require an event counter that
increments when a rising edge appears on any of three digital input lines.
Another application might require a digital line to be asserted after an
analog input exceeds a programmable threshold.
Device-Embedded Logic and Processing
You can implement LabVIEW logic and processing in the FPGA of the
R Series device. Typical logic functions include Boolean operations,
comparisons, and basic mathematical operations. You can implement
multiple functions efficiently in the same design, operating sequentially or
in parallel. You can implement more complex algorithms such as control
loops. You are limited only by the size of the FPGA.
Reconfigurable I/O Architecture
Figure 1-1 shows an FPGA connected to fixed I/O resources and a bus
interface. The fixed I/O resources include A/D converters (ADCs), D/A
converters (DACs), and digital I/O lines.
Figure 1-1.
High-Level FPGA Functional Overview
Software accesses the R Series device through the bus interface, and the
FPGA connects the bus interface and the fixed I/O to make possible timing,
triggering, processing, and custom I/O functions using the LabVIEW
FPGA Module.
FPGA
Bus Interface
Fixed I/O Resource
Fixed I/O Resource
Fixed I/O Resource
Fixed I/O Resource
