NI 9155 Operating Instructions and Specifications
12
ni.com
4.
Use a MXI-Express cable to connect the MXI-Express host system to
the Upstream port of the first NI 915x in the chain.
5.
Use a MXI-Express cable to connect the Downstream port of the
first NI 915x to the Upstream port of the next NI 915x in the chain.
Note
The maximum number of NI 915x chassis in a chain depends on the system
configuration. For example, a PXI system with an NI PXI-8196 controller can support
four chassis per chain. Different types of systems may support more or fewer chassis per
chain. For more information about how different system configurations can affect the
maximum number of chassis in a chain, go to
ni.com/info
and enter the Info Code
915xchain
.
6.
Power up all of the connected NI 915x chassis.
7.
Power up the MXI-Express host system.
Caution
All connected NI 915x chassis must have power connected before the host system
is powered up. The BIOS and OS of the host system must detect all bus segments on the
chassis side in order to configure the PCI hierarchy. Powering connected chassis up or
down while the host system is running can cause system hangs and data corruption.
Caution
Do
not
remove MXI-Express cables while power is connected. Doing so can
cause hangs or application errors. If a cable becomes unplugged, plug it back in and reboot.
Chassis Powerup Options
Table 1 lists the reset options available for the NI 9155. These options
determine how the chassis behaves when it is powered on in various
conditions. Use the RIO Device Setup utility to select reset options. Access
the RIO Device Setup utility by selecting
Start»All Programs»National
Instruments»NI-RIO»RIO Device Setup
.
If you want the NI 9155 to autoload and run a VI at powerup, you must also
configure the VI to autoload before you compile it. For more information
about autoloading VIs, refer to
LabVIEW FPGA Module Help
.
Table 1.
Chassis Powerup Options
Powerup Option
Behavior
Do Not Autoload VI
Does not load the FPGA bit stream from flash memory.
Autoload VI on device powerup
Loads the FPGA bit stream from flash memory to the FPGA
when the chassis powers on.
