Chapter 1
Introduction
1-12
ni.com
System Reference Clock
The PXI-1050 supplies the PXI 10 MHz system clock signal (PXI_CLK10)
independently to each peripheral slot. An independent buffer (having a
source impedance matched to the backplane and a skew of less than 1 ns
between slots) drives the clock signal to each peripheral slot. You can use
this common reference clock signal to synchronize multiple modules in a
measurement or control system. You can drive PXI_CLK10 from an
external source through the PXI_CLK10_IN pin on the P2 connector of the
Star Trigger slot. (Refer to Table B-4,
P2 (J2) Connector Pinout for the
.) Sourcing an external clock on this pin automatically
disables the backplane 10 MHz source.
