4-10
|
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Chapter 4
PFI 0 and Digital Input Measurements
Figure 4-13.
SCB-68A Circuit Diagram for Digital Input Attenuation
Use positions A and B for PFI 0, and determine the gain according to Equation 4-5:
(4-5)
Digital Input Voltage Dividers
If you use the
V
in
voltage of Figure 4-12 to feed TTL signals, you must calculate
V
in
so that the
voltage drop on
R
2
does not exceed 5 V.
Caution
A voltage drop exceeding 5 V on
R
2
can damage the internal circuitry of
the DAQ device. NI is
not
liable for any device damage resulting from improper use
of the SCB-68A and the DAQ device.
45
11
44
S
C10
A
+
B
11
+
44
PFI 0
D GND
G
B
B A
+
(
)
------------------
=
