B-26
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ni.com
Appendix B
Timing Diagrams
Figure B-31.
Start Trigger Path
Figure B-32.
Start Trigger Output Delay Timing Diagram
•
Pause Trigger
—Pause Trigger is only output asynchronously and only to RTSI. The actual
signal being routed is Selected Pause. The Pause Trigger output timing can be derived by
adding the delay in Table B-20 to the total Selected Pause delay.
Figure B-33.
Pause Trigger Path
Table B-19.
Start Trigger Output Delay Timing
Time
From
To
Min (ns)
Max (ns)
t
12
Selected Start
Trigger
PFI
8.1
9.1
27.1
30.8
Selected Start
Trigger
RTSI
7.5
7.7
17.9
18.5
S
elected
S
t
a
rt Trigger
S
ync
Sa
mple Clock Time
bas
e
D
Q
To Intern
a
l Logic
Ro
u
ting Logic
RT
S
I, PFI
S
elected
S
t
a
rt Trigger
PFI/RT
S
I Termin
a
l
t
12
S
elected P
aus
e Trigger
S
ync
Sa
mple Clock Time
bas
e
D
Q
To Intern
a
l Logic
Ro
u
ting Logic
RT
S
I
Summary of Contents for PCI-6281
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