Chapter 3
Signal Connections
©
National Instruments Corporation
3-3
NI PCIe-1433 User Manual and Specifications
Figure 3-3 shows the Medium/Full configuration 26-pin MDR connector,
which is labeled Port 1 on the NI 1433. Refer to Table 3-2 for a description
of the signals.
Figure 3-3.
NI 1433 Medium/Full Configuration MDR Connector Pin Assignments
SerTFG±
Serial transmission to the NI 1433 from the camera.
CC<4..1>±
Four LVDS pairs, defined as camera inputs and NI 1433 outputs, reserved
for camera control. On some cameras, the camera controls allow the
NI 1433 to control exposure time and frame rate.
Table 3-2.
NI 1433 Medium/Full Configuration MDR Signal Descriptions
Signal Name
Description
Y<3..0>±
Medium configuration data and enable signals from the camera to the
NI 1433.
YCLK±
Transmission clock on the Medium configuration chip for Camera Link
communication between the NI 1433 and the camera.
Z<3..0>±
Full configuration data and enable signals from the camera to the NI 1433.
ZCLK±
Transmission clock on the Full configuration chip for Camera Link
communication between the NI 1433 and the camera.
Table 3-1.
NI 1433 Base Configuration MDR Signal Descriptions (Continued)
Signal Name
Description
DGND
Y(0)+
Y(1)+
Y(2)+
YCLK+
Y(
3
)+
100
Ω
differenti
a
l termin
a
tion with pin 20
Z(0)+
Z(1)+
Z(2)+
ZCLK+
Z(
3
)+
DGND
DGND
Y(0)–
Y(1)–
Y(2)–
YCLK–
Y(
3
)–
100
Ω
differenti
a
l termin
a
tion with pin 7
Z(0)–
Z(1)–
Z(2)–
ZCLK–
Z(
3
)–
DGND
1
3
12
11
10
9
8
7
6
5
4
3
2
1
26
25
24
2
3
22
21
20
19
18
17
16
15
14
