Chapter 1
Getting Started
©
National Instruments Corporation
1-9
Figure 1-3.
PXIe_DSTAR and PXI Star Connectivity Diagram
PXI Local Bus
The PXI backplane local bus is a daisy-chained bus that connects each
peripheral slot with adjacent peripheral slots to the left and right, as shown
in Figure 1-4.
The backplane routes the full 13-line PXI Local Bus between adjacent PXI
slots (slots 2–6 and 15–18) and PXI Local Bus 6 between all other slots.
Refer to Figure 1-4 for details. The left local bus 6 from slot 1 is not routed
anywhere and the right local bus signals from slot 18 are not routed
anywhere.
P2
P1
XP4
XP
3
TP2
TP1
P2
P1
P2
P1
P2
P1
P1
P1
P1
XP4
XP
3
XP4
XP
3
XP4
XP
3
XP4
XP
3
XP4
XP
3
XP4
XP
3
XP4
XP
3
P2
P1
P2
P1
P2
P1
P2
P1
P2
P1
P1
XP4
XP
3
XP2
XP1
PXIe_D
S
TA
R
1
1
PXIe_D
S
TA
R
8
PXIe_D
S
TAR 6
PXIe_D
S
TAR 5
PXIe_D
S
TAR
3
PXIe_D
S
TAR 2
PXIe_D
S
TAR 1
PXIe_D
S
TA
R
1
PXIe_D
S
TAR 4
PXI
S
TAR
3
PXI
S
TAR 1
PXI
S
TAR 2
PXI
S
TAR 9
PXI
S
TAR 7
PXI
S
TAR 6
PXI
S
TAR 5
PXI
S
TAR 4
PXI
S
TAR
8
PX
S
TAR 11
PX D
S
TAR 10
PXI
S
TAR 1
3
PXI
S
TAR 12
PXI
S
TAR 15
PXI
S
TAR 14
PXI
S
TAR 16
PXI
S
TAR 0
1
8
9
10
7
H
11
H
H
12
H
1
3
14
15
6
5
4
3
2
16
17
1
8