Appendix A
Specifications
©
National Instruments Corporation
A-7
Backplane
Size......................................................... 3U-sized; one system slot
(with three system expansion
slots) and 17 peripheral slots.
Compliant with IEEE 1101.10
mechanical packaging.
PXI Express Specification
compliant.
Accepts both PXI Express and
CompactPCI (PICMG 2.0 R 3.0)
3U modules.
Backplane bare-board material .............. UL 94 V-0 Recognized
Backplane connectors ............................ Conforms to IEC 917 and
IEC 1076-4-101, and are
UL 94 V-0 rated
System Synchronization Clocks (PXI_CLK10, PXIe_CLK100,
PXIe_SYNC100)
10 MHz System Reference Clock: PXI_CLK10
Maximum slot-to-slot skew ................... 1 ns
Accuracy ................................................ ±25 ppm max. (guaranteed over
the operating temperature range)
Maximum jitter ...................................... 5 ps RMS phase-jitter
(10 Hz–1 MHz range)
Duty-factor ............................................. 45%–55%
Unloaded signal swing ........................... 3.3 V ±0.3 V
Note
For other specifications refer to the
PXI-1 Hardware Specification
.
100 MHz System Reference Clock: PXIe_CLK100 and
PXIe_SYNC100
Maximum slot-to-slot skew ................... 100 ps
Accuracy ................................................ ±25 ppm max. (guaranteed over
the operating temperature range)
