Chapter 1
Introduction
©
National Instruments Corporation
1-3
Figure 1-1.
NI PXIe-8106 Block Diagram
The NI PXIe-8106 consists of the following logic blocks on the CPU
module and the I/O (daughter card) module. The CPU module has the
following logic blocks:
•
Socket 479 CPU
is the socket definition for the Intel Pentium
M processor families.
•
The
SO-DIMM
block consists of two 64-bit DDR2 SDRAM sockets
that can hold up to 1 GB each.
•
The
Chipset GMCH
connects to the CPU, DDR2 SDRAM, video, and
Ethernet.
•
The
SMB to PXI
Trigger
provides a routable connection of the
PXI Express triggers to/from the SMB on the front panel.
Chipset I/O
Controller
Hub (ICH7M)
Chipset Graphics
Memory Controller
Hub (GMCH)
SO-DIMM
DDR2 SDRAM
PC2 5300
DVI/VGA
Memory Bus Ch. A/B
LPC
DVI-I
DMI
Core 2 Duo
Processor
(Socket 479 CPU)
Host Bus
Gigabit
Ethernet
RJ45
x1 PCIE
Express
Card/34 Slot
x1 PCIE
USB
USB 2.0 x4
SATA
Hard Disk
FLASH
Watchdog
SMB to
PXI Trigger
SMB
Connector
Super I/O
LPT
COM1
x4 PCIE
PCIE
Switch
x4 PCIE
x4 PCIE
x4 PCIE
PXI
Express
PXI
Triggers
GPIB
GPIB
Connector
PCI
USB 2.0 x4
SATA
SPI
x1 PCIE
