background image

Connector

Use

1G/10G ETH Two SFP+ input terminals used for 1G ETH or 10G ETH connectivity with the host

driver. Not currently supported in LabVIEW FPGA.

LO OUT 1 IF2 Output terminal for the IF LO signal exported by RF 1. LO OUT 1 IF2 is a female

SMA connector with an impedance of 50 Ω.

LO OUT 1 IF1 Output terminal for the RF LO signal exported by RF 1. LO OUT 1 IF1 is a female

SMA connector with an impedance of 50 Ω.

REF OUT

Output terminal for an external reference signal for the LO on the device. REF OUT

is a female SMA connector with an impedance of 50 Ω, and it is a single-ended

reference output. The output signal at this connector is 10 MHz at 3.3 V.

REF IN

Input terminal for an external reference signal for the LO on the device. REF IN is a

female SMA connector with an impedance of 50 Ω, and it is a single-ended

reference input. REF IN accepts a 10 MHz signal with a minimum input power of

0 dBm (0.632 V

pk-pk

) and a maximum input power of 15 dBm (3.56 V

pk-pk

) for a

square wave or sine wave.

LO IN 0 IF2

Terminal for an external signal to the IF LO input on the RF 0 daughterboard. This
signal can be used as the LO source for an RF 0 channel by selecting 

external

 on

that channel's LO source setting. LO IN 0 IF2 is a female SMA connector with an

impedance of 50 Ω.

LO IN 0 IF1

Terminal for an external signal to the IF LO input on the RF 0 daughterboard. This
signal can be used as the LO source for an RF 0 channel by selecting 

external

 on

that channel's LO source setting. LO IN 0 IF1 is a female SMA connector with an

impedance of 50 Ω.

PCIe x4

Port for a PCI Express Generation 1, x4 bus connection through an MXI Express

four-lane cable.

LO IN 1 IF2

Terminal for an external signal to the IF LO input on the RF 0 daughterboard. This
signal can be used as the LO source for an RF 0 channel by selecting 

external

 on

that channel's LO source setting. LO IN 1 IF2 is a female SMA connector with an

impedance of 50 Ω.

LO IN 1 IF1

Terminal for an external signal to the IF LO input on the RF 0 daughterboard. This
signal can be used as the LO source for an RF 0 channel by selecting 

external

 on

that channel's LO source setting. LO IN 1 IF1 is a female SMA connector with an

impedance of 50 Ω.

PPS TRIG OUT Output terminal for the pulse per second (PPS) timing reference. PPS TRIG OUT is

a female SMA connector with an impedance of 50 Ω, and it is a single-ended input.

The output signal is 0 V to 3.3 V TTL. You can also use this port as triggered output

(TRIG OUT) that you program with the PPS Trig Out I/O signal.

ni.com

34

USRP-2940/2942/2943/2944/2945 Getting Started

Summary of Contents for USRP-2940

Page 1: ...USRP 2940 2942 2943 Getting Started 2022 07 11 ...

Page 2: ...Driver 13 Verifying the Device Connection Optional 16 Troubleshooting 17 Why Doesn t the Device Power On 17 Why Doesn t the USRP Device Appear in the NI USRP Configuration Utility 18 Why Does USRP2 Appear Instead of the USRP Device in the NI USRP Configuration Utility 18 Should I Update Device Firmware and FPGA Images 18 Why Do I Receive an Enumeration Error 18 Why Don t NI USRP Examples Appear in...

Page 3: ...GPIO Connector 35 Where to Go Next 35 NI Services 36 National Instruments 3 USRP 2940 2942 2943 2944 2945 Getting Started ...

Page 4: ...evice Verifying the System Requirements To use the NI USRP instrument driver your system must meet certain requirements Refer to the product readme which is available online on the driver software download page or at ni com manuals for more information about minimum system requirements recommended system and supported application development environments ADEs Unpacking the Kit Notice To prevent el...

Page 5: ...USRP 2943R 1 2 GHz 6 GHz NI USRP 2943R 1 2 GHz 6 GHz Designed by Ettus Research Designed by Ettus Research JTAG 1 5 4 3 2 1 USRP RIO Device 2 SMA Driver Bit USRP 2945 Only 3 Getting Started Guide This Document and Safety Environmental and Regulatory Information Document 4 SMA m to SMA m Cable 5 30 dB SMA Attenuator Not Included with USRP 2945 Notice If you directly connect or cable a signal genera...

Page 6: ...Design Toolkit available for download at ni com downloads and included in LabVIEW Communications System Design Suite LabVIEW MathScript RT Module available for download at ni com downloads Additional SMA m to SMA m cables to use the REF IN and PPS IN signals PCIe MXI Express Interface Kit for USRP RIO to connect to a desktop computer ExpressCard Slot MXI Express Interface Kit for USRP RIO to conne...

Page 7: ...llow the instructions below that correspond with the ADE that you installed Installing the Software Using NI Package Manager Ensure that you have installed the latest version of NI Package Manager To access the download page for NI Package Manager go to ni com info and enter info code NIPMDownload Note NI USRP versions 18 1 to current are available to download using NI Package Manager To download ...

Page 8: ...USRP software 2 Download a version of NI USRP driver software 3 Follow the instructions in the installation prompts Note Windows users may see access and security messages during installation Accept the prompts to complete the installation 4 When the installer completes select Shut Down in the dialog box that prompts you to restart shut down or restart later Installing the Device Install all the s...

Page 9: ... included in your MXI Express interface kit 2 Connect the MXI device to the USRP RIO device using the PCIe cable included in your MXI Express interface kit Connecting to a Laptop Computer Connect the USRP RIO device to a laptop computer using the ExpressCard 8360 for USRP Device for PXI Remote Control 1 Touch the ExpressCard 8360 for USRP and outer metal case of the USRP RIO device simultaneously ...

Page 10: ...he Device 1 Connect the power supply to the USRP RIO device 2 Plug the power supply into a wall outlet Press the power button on the front of your device 3 Power on the chassis and network switch Synchronizing Multiple Devices Optional To set up a higher channel count system you can synchronize two or more USRP RIO devices so that they share clock and pulse per second PPS signals ni com 10 USRP 29...

Page 11: ... Ettus Research Designed by Ettus Research 3 4 5 6 2 1 7 8 7 8 3 4 5 6 2 1 PPS OUT 10 MHz OUT PPS OUT POWER GPS LOCK PPS STATUS EXTERNAL INTERNAL ETHERNET GPS ANT INPUT PRIMARY REF INTERNAL EXTERNAL EXT 10 MHz INPUT EXT PPS INPUT POWER 8 Channel Clock Distribution Module 6 15 V 6 W MAX 0 1 PWR REF IN PPS OUT TRIG 5V DC REF OUT 1G 10G ETH 3 3 V 15 dBm MAX 9 16V DC 7 5 A MAX SFP Ports PCIe x4 TRIG 3...

Page 12: ...o prepare a single USRP 2945 device to export LO OUT 1 and re import to LO IN 1 and LO IN 0 1 Connect the LO OUT 1 IF2 connector of the USRP 2945 back panel to the IN connector of an RF power amplifier front panel using an SMA m to SMA m cable 2 Connect the OUT connector of the RF power amplifier to the input port of a two way RF power splitter using an SMA m to SMA m cable 3 Connect the two outpu...

Page 13: ...MA m to SMA m Cables Programming the Device You can use the NI USRP instrument driver to create communications applications for the USRP RIO device USRP RIO devices are LabVIEW FPGA targets which support creating custom FPGAs and configuring the device using Instrument Design Libraries IDLs Note You must use the PCIe x4 connector if you want to program the FPGA You cannot use the 1G 10G ETH connec...

Page 14: ...st software defined radio SDR applications Create custom measurements or applications that require in phase quadrature modulation I Q data Use with the Modulation Toolkit to develop SDR transmitters and receivers Use with the Modulation Toolkit to create and generate modulated signals LabVIEW NXG and LabVIEW Communications System Design Suite Diagram Hardware Interfaces Wireless Design and Test NI...

Page 15: ...e available in the following locations Content Type Description LabVIEW LabVIEW NXG or LabVIEW Communications System Design Suite Examples NI USRP includes several example applications that serve as interactive tools programming models and building blocks in your own applications NI USRP includes examples for getting started and other software defined radio SDR functionality Note You can access ad...

Page 16: ...aming application From the Create Project dialog select Sample Projects in the left pane and navigate to the NI USRP Simple Streaming project From the Projects tab select USRP RIO and choose the applicable sample project for your device and setup Note The NI Example Finder does not include NI USRP examples Verifying the Device Connection Optional Complete the steps appropriate for your installed A...

Page 17: ...ppropriate streaming VI according to your USRP RIO device Device VI USRP 2940 2942 2943 2944 Tx and Rx Streaming Host VI USRP 2945 Rx Streaming Host VI If the device is transmitting and or receiving signals the front panel graphs display waveform data 4 Click STOP to conclude the test Troubleshooting If an issue persists after you complete a troubleshooting procedure search our KnowledgeBase for a...

Page 18: ...uld I Update Device Firmware and FPGA Images Your device ships with firmware and FPGA images compatible with the NI USRP driver software You may need to update the device for compatibility with the latest version of the software The driver software media also includes the NI USRP Configuration Utility which you can use to update the devices Why Do I Receive an Enumeration Error If you are using a ...

Page 19: ...ue to step 7 9 Uninstall the BIOS Compatibility software Restart your computer 10 Repeat step 4 If trouble persists contact NI or visit ni com support Why Don t NI USRP Examples Appear in the NI Example Finder in LabVIEW NI USRP does not install examples into the NI Example Finder Related concepts NI USRP Examples Lessons and Sample Projects Direct Connections to the Device The USRP RIO device is ...

Page 20: ...n JTAG A USB port that connects the host computer to the device FPGA for development and debugging LabVIEW FPGA does not currently support configuring or programming the device FPGA using the JTAG connector RF 0 TX1 RX1 Input and output terminal for the RF signal TX1 RX1 is an SMA f connector with an impedance of 50 Ω and is a single ended input or output channel RX2 Input terminal for the RF sign...

Page 21: ... There is no reference signal or the device is not locked to the reference signal Green Blinking The device is not locked to the reference signal Solid The device is locked to the reference signal GPS Indicates whether the GPSDO is locked Off There is no GPSDO or the device or the GPS is not locked Green The GPSDO is locked LINK Indicates the status of the link to a host computer Off There is no l...

Page 22: ...t 3 3 V REF IN Input terminal for an external reference signal for the LO on the device REF IN is a female SMA connector with an impedance of 50 Ω and it is a single ended reference input REF IN accepts a 10 MHz signal with a minimum input power of 0 dBm 0 632 Vpk pk and a maximum input power of 15 dBm 3 56 Vpk pk for a square wave or sine wave PCIe x4 Port for a PCI Express Generation 1 x4 bus co...

Page 23: ...onfiguring or programming the device FPGA using the JTAG connector RF 0 TX1 RX1 Input and output terminal for the RF signal TX1 RX1 is an SMA f connector with an impedance of 50 Ω and is a single ended input or output channel RX2 Input terminal for the RF signal RX2 is an SMA f connector with an impedance of 50 Ω and is a single ended input channel AUX I O General purpose I O GPIO port AUX I O is ...

Page 24: ...he device is not locked to the reference signal Solid The device is locked to the reference signal PPS Indicates the pulse per second PPS Off There is no reference signal or the device is not locked to the reference signal Green Blinking The device is not locked to the reference signal Solid The device is locked to the reference signal GPS Indicates whether the GPSDO is locked Off There is no GPSD...

Page 25: ... signal for the LO on the device REF IN is a female SMA connector with an impedance of 50 Ω and it is a single ended reference input REF IN accepts a 10 MHz signal with a minimum input power of 0 dBm 0 632 Vpk pk and a maximum input power of 15 dBm 3 56 Vpk pk for a square wave or sine wave PCIe x4 Port for a PCI Express Generation 1 x4 bus connection through an MXI Express four lane cable PPS TRI...

Page 26: ...pport configuring or programming the device FPGA using the JTAG connector RF 0 TX1 RX1 Input and output terminal for the RF signal TX1 RX1 is an SMA f connector with an impedance of 50 Ω and is a single ended input or output channel RX2 Input terminal for the RF signal RX2 is an SMA f connector with an impedance of 50 Ω and is a single ended input channel AUX I O General purpose I O GPIO port AUX ...

Page 27: ... There is no reference signal or the device is not locked to the reference signal Green Blinking The device is not locked to the reference signal Solid The device is locked to the reference signal GPS Indicates whether the GPSDO is locked Off There is no GPSDO or the device or the GPS is not locked Green The GPSDO is locked LINK Indicates the status of the link to a host computer Off There is no l...

Page 28: ... a single ended reference output The output signal at this connector is 10 MHz at 3 3 V REF IN Input terminal for an external reference signal for the LO on the device REF IN is a female SMA connector with an impedance of 50 Ω and it is a single ended reference input REF IN accepts a 10 MHz signal with a minimum input power of 0 dBm 0 632 Vpk pk and a maximum input power of 15 dBm 3 56 Vpk pk for ...

Page 29: ...A USB port that connects the host computer to the device FPGA for recovery purposes This port can be used with the Xilinx iMPACT configuration tool to temporarily load a new bitfile RF 0 TX1 RX1 Input and output terminal for the RF signal TX1 RX1 is an SMA f connector with an impedance of 50 Ω and is a single ended input or output channel RX2 Input terminal for the RF signal RX2 is an SMA f connec...

Page 30: ...re is no PPS timing reference signal or the device is not locked to the reference signal Green Blinking The device is locked to the PPS timing reference signal GPS Indicates whether the GPSDO is locked OFF There is no GPSDO or the GPSDO is not locked Green Solid The GPSDO is locked LINK Indicates the status of the link to a host computer OFF There is no link to a host computer Green yellow or red ...

Page 31: ...Vpk pk for a square wave or sine wave PCIe x4 Port for a PCI Express Generation 1 x4 bus connection through an MXI Express four lane cable PPS TRIG OUT Output terminal for the pulse per second PPS timing reference PPS TRIG OUT is a female SMA connector with an impedance of 50 Ω and it is a single ended input The output signal is 0 V to 3 3 V TTL You can also use this port as triggered output TRIG ...

Page 32: ...put terminal for the RF signal RX1 is an SMA f connector with an impedance of 50 Ω and is a single ended input channel RX2 Input terminal for the RF signal RX2 is an SMA f connector with an impedance of 50 Ω and is a single ended input channel Table 14 Connector Descriptions Note The LED indications described in the following table occur only when you use the NI USRP API with the default API image...

Page 33: ...cked OFF There is no GPSDO or the GPSDO is not locked Green Solid The GPSDO is locked LINK Indicates the status of the link to a host computer OFF There is no link to a host computer Green yellow or red Solid The host is actively communicating with the device RF 1 RX1 Indicates the receive status of the module OFF The module is not active Green Solid The module is receiving data RX2 Indicates the ...

Page 34: ...nnel s LO source setting LO IN 0 IF2 is a female SMA connector with an impedance of 50 Ω LO IN 0 IF1 Terminal for an external signal to the IF LO input on the RF 0 daughterboard This signal can be used as the LO source for an RF 0 channel by selecting external on that channel s LO source setting LO IN 0 IF1 is a female SMA connector with an impedance of 50 Ω PCIe x4 Port for a PCI Express Generati...

Page 35: ...and an output of DC 5 V to power an active antenna Notice Do not terminate the GPS ANT port if you do not use it Table 16 Connector Descriptions GPIO Connector AUX I O Connector Pin NI USRP Terminal Name USRP RIO LV FPGA IO Node Terminal Name 8 7 6 5 4 3 2 1 15 14 13 12 11 10 9 1 3 3 V 3 3 V 2 GPIO 0 AUX I O 0 3 GPIO 1 AUX I O 1 4 GPIO 2 AUX I O 2 5 GPIO 3 AUX I O 3 6 GPIO 4 AUX I O 4 7 GPIO 5 AUX...

Page 36: ...rvices Updates ni com updates NI USRP Instrument Driver AUX I O 3 3 VDC MAX RF 0 RF 1 Designed by Ettus Research Designed by Ettus Research NI Services Visit ni com support to find support resources including documentation downloads and troubleshooting and application development self help such as tutorials and examples Visit ni com services to learn about NI service offerings such as calibration ...

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