12
User’s Manual U12697EJ3V0UM
CONTENTS
CHAPTER 1 OVERVIEW ....................................................................................................................
31
1.1
Features .................................................................................................................................
33
1.2
Ordering Information ............................................................................................................
34
1.3
Pin Configuration (Top View) ..............................................................................................
35
1.4
Block Diagram .......................................................................................................................
38
1.5
Function List .........................................................................................................................
39
1.6
Differences Between
µ
PD784225 Subseries Products and
µ
PD784225Y Subseries
Products ................................................................................................................................
42
CHAPTER 2 PIN FUNCTIONS ...........................................................................................................
43
2.1
Pin Function List ...................................................................................................................
43
2.2
Pin Function Description .....................................................................................................
47
2.3
Pin I/O Circuits and Recommended Connection of Unused Pins ....................................
53
CHAPTER 3 CPU ARCHITECTURE ..................................................................................................
57
3.1
Memory Space ......................................................................................................................
57
3.2
Internal ROM Area ................................................................................................................
61
3.3
Base Area ..............................................................................................................................
62
3.3.1 Vector table area .........................................................................................................................
63
3.3.2 CALLT instruction table area .......................................................................................................
64
3.3.3 CALLF instruction entry area .......................................................................................................
64
3.4
Internal Data Area .................................................................................................................
65
3.4.1 Internal RAM area .......................................................................................................................
66
3.4.2 Special function register (SFR) area ...........................................................................................
69
3.4.3 External SFR area .......................................................................................................................
69
3.5
External Memory Space .......................................................................................................
69
3.6
µ
PD78F4225 Memory Mapping ............................................................................................
70
3.7
Control Registers ..................................................................................................................
71
3.7.1 Program counter (PC) .................................................................................................................
71
3.7.2 Program status word (PSW) ........................................................................................................
71
3.7.3 Using the RSS bit ........................................................................................................................
75
3.7.4 Stack pointer (SP) .......................................................................................................................
78
3.8
General-Purpose Registers .................................................................................................
82
3.8.1 Structure ......................................................................................................................................
82
3.8.2 Functions .....................................................................................................................................
84
3.9
Special Function Registers (SFRs) .....................................................................................
87
3.10 Cautions ................................................................................................................................
92
CHAPTER 4 CLOCK GENERATOR ..................................................................................................
93
4.1
Functions ...............................................................................................................................
93
4.2
Configuration ........................................................................................................................
93
4.3
Control Registers ..................................................................................................................
95
4.4
System Clock Oscillator ....................................................................................................... 100
