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CHAPTER 8 16-BIT TIMER/EVENT COUNTER
User’s Manual U12697EJ3V0UM
(10) Conflict operation
<1>
Conflict between the read period of the 16-bit capture/compare registers (CR00 and CR01) and the capture
trigger input (CR00 and CR01 are used as capture registers.)
The capture trigger input is preceded. The read data of CR00 and CR01 is undefined.
<2>
Match timing conflict between the write the period of the 16-bit capture/compare registers (CR00 and CR01)
and 16-bit timer counter 0 (TM0). (CR00 and CR01 are used as compare registers.)
A match discrimination is not normally performed. Do not perform the write operation of CR00 and CR01
around the match timing.
