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CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 1, 2
User’s Manual U12697EJ3V0UM
(1) 8-bit timer counters 1 and 2 (TM1, TM2)
TM1 and TM2 are 8-bit read-only registers that count the count pulses.
The counter is incremented synchronous to the rising edge of the count clock. When the count is read out during
operation, the count clock input temporarily stops and the count is read at that time. In the following cases, the
count becomes 00H.
<1> RESET is input.
<2> TCEn is cleared.
<3> TMn and CRn0 match in the clear and start mode.
Caution During the cascade connection, the count becomes 00H by clearing both bit 7 (TCE1) of 8-
bit timer mode control register 1 (TMC1) and bit 7 (TCE2) of 8-bit timer mode control register
2 (TMC2).
Remark
n = 1, 2
(2) 8-bit compare registers 10 and 20 (CR10, CR20)
The values set in CR10 and CR20 are compared to the count in 8-bit timer register 1 (TM1) and 8-bit timer counter
2 (TM2), respectively. If the two values match, interrupt requests (INTTM1, INTTM2) is generated (except in the
PWM mode).
The values of CR10 and CR20 can be set in the range of 00H to FFH, and can be written during counting.
Caution If data is set in a cascade connection, always set after stopping the timer. To stop timer
operation, clear both bit 7 of TMC1 (TCE1) and bit 7 of TMC2 (TCE2).
