60
CHAPTER 3 CPU ARCHITECTURE
User
’s Manual U12697EJ3V0UM
Figure 3-2.
µ
PD784225 Memory Map
Notes 1.
Access in the external memory expansion mode.
2.
The 4,608 bytes in this area can be used as the internal ROM only when the LOCATION 0FH instruction is executed.
3.
LOCATION 0H instruction execution: 126,464 bytes; LOCATION 0FH instruction execution: 131,072 bytes
4.
This is the base area and the entry area based on resets or interrupts. However, the internal RAM is excluded in a reset.
Internal ROM
(60,928 bytes)
(256 bytes)
Special function registers (SFR)
Internal RAM
(4,352 bytes)
External memory
Note 1
(896 KB)
Note 1
General-purpose
registers (128 bytes)
Macro service control word
area (52 bytes)
Data area (512 bytes)
Program/data area
(3,840 bytes)
CALLF entry
area (2 KB)
Program/data area
Note 3
CALLT table area
(64 bytes)
Vector table area
(64 bytes)
Internal RAM
(4,352 bytes)
External memory
Note 1
(912,896 bytes)
(256 bytes)
Internal ROM
(128 KB)
On execution of
LOCATION 0H instruction
Special function registers (SFR)
Note 1
On execution of
LOCATION 0FH instruction
H
F
F
F
F
F
H
0
0
0
0
1
H
F
F
F
F
0
H
F
D
F
F
0
H
0
D
F
F
0
H
0
0
F
F
0
H
F
F
E
F
0
H
0
0
E
E
0
H
F
F
D
E
0
H
0
0
0
0
0
H
F
F
E
F
0
H
0
8
E
F
0
H
F
7
E
F
0
H
9
3
E
F
0
H
0
0
D
F
0
H
F
F
C
F
0
H
6
0
E
F
0
H
0
0
E
E
0
H
0
0
0
1
0
H
F
F
F
0
0
H
0
0
8
0
0
H
F
F
7
0
0
H
0
8
0
0
0
H
F
7
0
0
0
H
0
4
0
0
0
H
F
3
0
0
0
H
0
0
0
0
0
H
F
F
E
F
F
H
0
8
E
F
F
H
F
7
E
F
F
H
9
3
E
F
F
H
6
0
E
F
F
H
0
0
D
F
F
H
F
F
C
F
F
H
0
0
E
E
F
H
0
0
0
0
0
H
F
F
F
F
1
H
0
0
0
0
2
H
F
F
D
E
F
H
0
0
E
E
F
H
F
F
F
F
F
H
F
D
F
F
F
H
0
D
F
F
F
H
0
0
F
F
F
H
F
F
E
F
F
Note 4
Note 4
H
F
F
F
F
1
Internal ROM
(65,536 bytes)
H
0
0
0
0
2
H
F
F
F
F
1
H
F
F
F
F
1
Note 2
H
F
F
D
E
0
H
0
0
0
0
1
