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CHAPTER 3 CPU ARCHITECTURE
User’s Manual U12697EJ3V0UM
3.7 Control Registers
The control registers are the program counter (PC), program status word (PSW), and stack pointer (SP).
3.7.1 Program counter (PC)
This is a 20-bit binary counter that saves address information about the program to be executed next (see
Figure
3-5
).
Usually, this counter is automatically incremented based on the number of bytes in the instruction to be fetched.
When the instruction that is branched is executed, the immediate data or register contents are set.
RESET input sets the lower 16 bits of the PC to the 16-bit data at addresses 0 and 1, and 0000 in the higher four
bits of the PC.
Figure 3-5. Format of Program Counter (PC)
19
0
PC
3.7.2 Program status word (PSW)
The program status word (PSW) is a 16-bit register that consists of various flags that are set and reset based on
the result of the instruction execution.
A read or write access is performed in higher 8 bit (PSWH) and the lower 8 bits (PSWL) units. In addition, bit
manipulation instructions can manipulate each flag.
The contents of the PSW are automatically saved on the stack when a vectored interrupt request is accepted and
when a BRK instruction is executed, and are automatically restored when a RETI or RETB instruction is executed.
When context switching is used, the contents are automatically saved to PR3, and automatically restored when a
RETCS or RETCSB instruction is executed.
RESET input resets all of the bits to 0.
Always write 0 in the bits indicated by “0” in Figure 3-6. The contents of bits indicated by “-” are undefined when
read.
