CHAPTER 15 CLOCKED SERIAL INTERFACE 0 (CSI0)
User’s Manual U16896EJ2V0UD
438
(2) Clocked serial interface clock selection register n (CSICn)
The CSICn register is an 8-bit register that controls the CSI0n transfer operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Caution The CSICn register can be overwritten only when the CSIM0n.CSI0En bit = 0.
7
0
CSICn
(n = 0, 1)
6
0
5
0
4
CKPn
3
DAPn
2
CKS0n2
1
CKS0n1
0
CKS0n0
After reset: 00H R/W Address: CSIC0 FFFFFD01H, CSIC1 FFFFFD11H
CKPn
DAPn
Specification of timing of transmitting/receiving data to/from SCK0n
0 0
(Type 1)
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
DI7
SO0n (output)
SCK0n (I/O)
SI0n (input)
DI6
DI5
DI4
DI3
DI2
DI1
DI0
0 1
(Type 2)
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
SO0n (output)
SCK0n (I/O)
SI0n (input)
1 0
(Type 3)
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
SO0n (output)
SCK0n (I/O)
SI0n (input)
1 1
(Type 4)
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
SO0n (output)
SCK0n (I/O)
SI0n (input)
CKS0n2 CKS0n1 CKS0n0
Serial
clock
Note
Mode
0 0 0
f
XX
/2 Master
mode
0 0 1
f
XX
/2
2
Master
mode
0 1 0
f
XX
/2
3
Master
mode
0 1 1
f
XX
/2
4
Master
mode
1 0 0
f
XX
/2
5
Master
mode
1 0 1
f
XX
/2
6
Master
mode
1
1
0
Clock generated by TO5n
Master mode
1 1 1
External
clock
(SCK0n pin)
Slave mode
Note
Set the serial clock so as to satisfy the following conditions.
•
V
DD
= 4.0 to 5.5 V: Serial clock
≤
5 MHz
•
V
DD
= 2.7 to 4.0 V: Serial clock
≤
2.5 MHz
Remark
f
XX
: Main clock frequency