Glossary 13
I/O address
Input-Output address. How the CPU sees an I/O port. It puts data into
this address or reads the data in it. The device at the other end of the
I/O port gets the data from that address or puts the data there,
respectively.
IRQ
Interrupt Request. A signal that, when received by the CPU, makes it
stop what it is doing to do something else. An interrupt is a way in
which a particular device in a computer communicates with the CPU.
PCs have 16 IRQ lines that can be assigned to different devices (for
example, printers, scanners, modems). No two devices can have the
same IRQ address. See interrupt.
ISA
Industry Standard Architecture. The bus architecture used in the IBM
PC/XT and PC/AT. The AT version of the bus is called the AT bus
and has become an industry standard. The apparent successor is the
PCI local bus architecture found in most of today’s computers. Most
modern computers include both an AT bus for slower devices and a
PCI local bus for devices that need better bus performance. In 1993,
Intel and Microsoft introduced a new version of the ISA specification
called Plug and Play ISA. Plug and Play ISA enables the operating
system to configure expansion boards automatically so that users do
not need to fiddle with DIP switches and jumpers. See plug and play.
isochronous
A form of data transmission in which individual characters are only
separated by a whole number of bit-length intervals.
K
kilobyte
(KB) 1024 bytes.
L
L2 cache
Refers to “level 2” or “secondary” cache. A type of cache that resides
on the motherboard except when referring to a Pentium II machine,
where it resides on the CPU module.