POC-100 User’s Manual
Copyright © 2013 Neousys Technology Inc. All Right Reserved.
Page 28 of 65
Pin#
Definition
Description
1
LVDS_CLK_N
Differential clock output - negative
2
DATA0_N
Differential data output - negative
3
LVDS_CLK_P
Differential clock output - positive
4
DATA0_P
Differential data output - positive
5
GND
Ground
6
GND
Ground
7
LDDC_CLK
Display Data Channel clock
8
DATA1_N
Differential data output - negative
9
LDDC_DATA
Display Data Channel data
10
DATA1_P
Differential data output - positive
11
GND
Ground
12
GND
Ground
13
LCTLA_CLK
External SSC clock chip control
14
DATA2_N
Differential data output - negative
15
LCTLA_DATA
External SSC clock chip control
16
DATA2_P
Differential data output - positive
17
GND
Ground
18
GND
Ground
19
VCC_FPD
Power supply
20
VCC_FPD
Power supply
Signal Level (VFD) Selection Jumper