Chapter 3
Hardware Overview
©
National Instruments Corporation
3-19
Using the PLL provides several advantages over the other two options for
replacing the PXI backplane clock:
•
CLKIN is not required to be 10 MHz. If you have a stable reference
that is a multiple of 1 MHz, such as 13 or 5 MHz, you can
frequency-lock the chassis to it.
•
If CLKIN stops or becomes disconnected, PXI_CLK10 is still present
in the chassis.
•
If CLKIN is 10 MHz, the NI 6653 can compensate for distribution
delays in the backplane. The feedback in the PLL comes from
PXI_CLK10. This PLL makes it possible for the NI 6653 to align
clock edges at CLKIN with the edges of PXI_CLK10 that the modules
receive. If you split an external (accurate) 10 MHz reference and route
it to two chassis, they can both lock to it. The result is a tighter
synchronization of PXI_CLK10 on the chassis.
