ISD94100 Series Technical Reference Manual
Sep 9, 2019
Page
122
of 928
Rev1.09
IS
D
9
410
0
S
ER
IE
S
T
E
C
HN
ICA
L
RE
F
E
RE
NCE
M
AN
U
AL
IRQ0 ~ IRQ95 Interrupt Priority Register (NVIC_IPRn)
Register
Offset
R/W Description
Reset Value
NVIC_IPRn
n=0,1..23
0xE000E400
+0x4*n
R/W IRQ0 ~ IRQ95 Priority Control Register
0x0000_0000
31
30
29
28
27
26
25
24
PRI_4n_3
Reserved
23
22
21
20
19
18
17
16
PRI_4n_2
Reserved
15
14
13
12
11
10
9
8
PRI_4n_1
Reserved
7
6
5
4
3
2
1
0
PRI_4n_0
Reserved
Bits
Description
[31:28]
PRI_4n_3
Priority of 3
“0” denotes the highest priority and “15” denotes the lowest priority
[27:24]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[23:20]
PRI_4n_2
Priority of 2
“0” denotes the highest priority and “15” denotes the lowest priority
[19:16]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[15:12]
PRI_4n_1
Priority of 1
“0” denotes the highest priority and “15” denotes the lowest priority
[11:8]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[7:4]
PRI_4n_0
Priority of 0
“0” denotes the highest priority and “15” denotes the lowest priority
[3:0]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
