ISD94100 Series Technical Reference Manual
Sep 9, 2019
Page
456
of 928
Rev1.09
IS
D
9
410
0
S
ER
IE
S
T
E
C
HN
ICA
L
RE
F
E
RE
NCE
M
AN
U
AL
1 = Load window is set.
Note:
This bit only use in window loading mode, WINLDEN3(PWM_CTL0[11]) = 1.
[2]
LOAD2
PWM Channel 2 Re-load PWM Comparator Register (CMPDAT) Control Bit
This bit is software write, hardware clear when current PWM period end.
Write Operation:
0 = No effect.
1 = Set load window of window loading mode.
Read Operation:
0 = No load window is set.
1 = Load window is set.
Note:
This bit only use in window loading mode, WINLDEN2(PWM_CTL0[10]) = 1.
[1]
LOAD1
PWM Channel 1 Re-load PWM Comparator Register (CMPDAT) Control Bit
This bit is software write, hardware clear when current PWM period end.
Write Operation:
0 = No effect.
1 = Set load window of window loading mode.
Read Operation:
0 = No load window is set.
1 = Load window is set.
Note:
This bit only use in window loading mode, WINLDEN1(PWM_CTL0[9]) = 1.
[0]
LOAD0
PWM Channel 0 Re-load PWM Comparator Register (CMPDAT) Control Bit
This bit is software write, hardware clear when current PWM period end.
Write Operation:
0 = No effect.
1 = Set load window of window loading mode.
Read Operation:
0 = No load window is set.
1 = Load window is set.
Note:
This bit only use in window loading mode, WINLDEN0(PWM_CTL0[8]) = 1.