ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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S
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ICA
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M
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U
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START (S) and Repeated START (Sr) conditions are functionally identical. By generating Repeated
START (Sr) condition, a master can transmit and/or receive data from the same slave or different
slaves without releasing the bus.
6.13.5.1.2 STOP signal
I2C data flow follows the direction indicated by the R/W bit in addressing byte. The receiver (master
or slave) should acknowledge each received byte on the 9th SCL clock cycle.
•
If the slave signals a Not Acknowledge (NACK), the master can generate a STOP condition to
abort the data transfer or generate a Repeated START condition and start a new transmission.
•
If the master, as a receiving device, does Not Acknowledge (NACK) the slave, the slave
releases the SDA line for the master to generate a STOP or Repeated START condition.
SDA
SCL
Data line stable;
data valid
Change of data
allowed
Figure 6.13-4 Bit Transfer on the I
2
C Bus
Data output by
transmitter
SCL from
master
START
condition
acknowlegde
Data output
by receiver
S
1
2
8
9
Clock pulse for
acknowledgement
not acknowlegde
Figure 6.13-5 Acknowledge on the I
2
C Bus
