ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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ICA
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NCE
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6.17.6 Register Map
R
: Read only,
W
: Write only,
R/W
: Both read and write
Register
Offset
R/W Description
Reset Value
I2S Base Address
I2S_BA = 0x4004_8000
I2S_CTL0
0x00
R/W I
2
S Control Register 0
0x0000_0000
I2S_CTL1
0x20
R/W I
2
S Control Register 1
0x0000_0000
I2S_CLKDIV
0x04
R/W I
2
S Clock Divider Register
0x0000_0000
I2S_IEN
0x08
R/W I
2
S Interrupt Enable Register
0x0000_0000
I2S_STATUS0
0x0C
R/W I
2
S Status Register 0
0x0014_1000
I2S_STATUS1
0x24
R/W I
2
S Status Register 1
0x0000_0000
I2S_TXFIFO
0x10
W
I
2
S Transmit FIFO Register
0x0000_0000
I2S_RXFIFO
0x14
R
I
2
S Receive FIFO Register
0x0000_0000
Note:
1.
Any register not listed here is reserved and must not be written. The result of a read operation on these bits is undefined.
2.
The reserved register fields that listed in register description must be written to their reset value. Writing reserved fields with
other than reset values may produce undefined results.