ISD94100 Series Technical Reference Manual
Sep 9, 2019
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6.8.5.2
PWM Counter
PWM supports 3 counter types operation: Up Counter, Down Counter and Up-Down Counter types.
For PWM channel0, CNT(PWM_CNT0[15:0]) can clear to 0x00 by CNTCLR0 (PWM_CNTCLR[0]).
CNT will be cleared when prescale counter to 0, and CNTCLR will be set 0 by hardware
automatically.
0
1
CNT
(PWM_CNT0[15:0])
4
Prescale counter
3 2 1 0
CNTEN0
(PWM_CNTEN[0])
4 3 2 1 0 4 3 2 1 0
3 2 1 0 4
4
3
0
2
1
2
PWM0_CLK
4 3 2 1 0
x
CNTCLR0
(PWM_CNTCLR[0])
0
PCLK
Figure 6.8-7 PWM0 Counter Waveform when set clear counter
6.8.5.3
Up Counter Type
When PWM counter is set to up counter type, CNTTYPEn (PWM_CTL1[2n+1:2n], n = 0,1..5) is
0x0, it starts up-counting from zero to PERIOD (PWM_PERIODn[15:0], where n denotes channel
number) to complete a PWM period. The current counter value can be read from CNT
(PWM_CNTn[15:0]) bits. PWM generates zero point event when the counter counts to 0 and
prescale counts to 0. PWM generates period point event when the counter counts to PERIOD and
prescale counts to 0. The Figure 6.8-8 shows an example of up counter, wherein
PWM period time = (1) *(1)* PWM0_CLK.
0
1
2
3
4
5
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
0
1
2
PWM Period
PWM Period
PERIOD = 5
PERIOD = 8
PWM Period
PERIOD = 8
zero point event
period point event
CNT
(PWM_CNTn[15:0])
CNTENn
(PWM_CNTEN[n])
X
Note:
n denotes channel 0,1..5
Figure 6.8-8 PWM Up Counter Type
