EVB-VF522R3 Platform User’s Guide, Rev. 0, 11/2014
Freescale Semiconductor, Inc.
23
Audio blocks
•
Addressable via the MCU channel SAI1.
13.2
“Aux In” connector (J1, P6)
A stereo “Aux In” port is implemented on a 3.5 mm jack socket P6. Its signal is fed through an input filter
and then digitized in a dedicated audio ADC (U502) with the output routed to either the DSP (U510) or
MCU EASI_SDI0 pin, depending on the jumper J1 configuration (see
Table 15
).
13.3
Headphone/audio outputs (P7, P8)
The EVB features two 3.5 mm stereo output jacks capable of load impedance as low as 32 Ohms, e.g.
headphones. As shown in
, the stereo audio signal is fed from the DSP to a DAC (U505, U506),
through a filter to the headphone amplifier (U501, U500) and finally to the output jack (P7, P8),
respectively.
Figure 24. Audio output block
13.4
DSP block (J2, J3, P10)
The DSP block on the EVB:
•
Is based on the DSP IC (U510),
•
Has a dedicated DSP debug header (P10),
•
Is capable of operation in both Slave (by default) and Master modes as selected by jumper J2 (see
Table 15
),
•
Has a dedicated SPI Serial Flash IC (U2),
•
Communicates with the MCU over the SPI0 (PCS0) channel,
•
Boots either from the MCU or dedicated Flash.
NOTE
The DSP reset input is connected to output 1 of the Peripheral Reset-Control
Multiplexer (see
Section 7, “Peripheral reset-control multiplexer
”). When
reset, its outputs are in the high-impedance state, but, thanks to a pull-down
resistor on the reset line, the DSP is reset until the line is actively driven by
the MCU via the Peripheral Reset-Control Multiplexer.
