NXP Semiconductors
UM11620
FRDMGD3160XM3EVM half-bridge evaluation board
Figure 3. Evaluation board voltage and interface domains
Pin
Name
Function
1
AOUTL
analog output duty cycle encoded signal (low side) for reading temperature via
TSENSEA or voltage via AMUXIN
2
n.c.
not connected
3
CSBL
chip select bar (low side)
4
n.c.
not connected
5
PWML
pulse width modulation (PWM) input (low side)
6
INTBL
interrupt bar (low side)
7
MOSIL
master out slave in (low side)
8
SCLK
serial clock input
9
MISOL
master in slave out (low side)
10
EN_PS
MCU control of flyback power supply
11
FSSTATEL
fail-safe state (low side)
12
GND
ground
13
FSENB
fail-safe enable (high side and low side)
14
MISOH
master in slave out (high side)
Table 2. Low-voltage domain 24-pin connector definitions
UM11620
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
User guide
Rev. 1 — 10 June 2021
9 / 38