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© Freescale Semiconductor, Inc. 2011. All rights reserved.

KT33905UG
Rev. 2.0

9/2011

Information in this document is provided solely to enable system and 
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information in this document.

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Summary of Contents for Freescale KIT33905

Page 1: ...KEVBE 5 Volt KIT33905BD3EVBE 3 3 Volt Figure 1 KIT33905D5EKEVBE KIT33905BD3EVBE Evaluation Boards Table of Contents 1 Kit Contents Packing List 2 2 Important Notice 3 3 Introduction 4 4 Required Equip...

Page 2: ...ards Rev 2 0 2 Freescale Semiconductor Kit Contents Packing List 1 Kit Contents Packing List KIT33905D5EKEVBE or KIT33905BD3EVBE Hardware CD33905 includes SPIGen Software CABLE RIBBON FLAT 16 PIN ASSY...

Page 3: ...the date of delivery and will be replaced by a new kit Freescale reserves the right to make changes without further notice to any products herein Freescale makes no warranty representation or guarant...

Page 4: ...graphical user interface paired up with the SPI dongle board KITUSBSPIDGLEVME through the 2x8 pin ribbon cable Additionally for added flexibility the user can implement a custom board with a microcon...

Page 5: ...des CAN or LIN bus I O transition automatic timer SPI message and VDD over current detection Voltage current and temperature protection with enhanced diagnostics that can be monitored by the system vi...

Page 6: ...KIT33905 Evaluation Boards Rev 2 0 6 Freescale Semiconductor EVB Setup Configuration 5 EVB Setup Configuration Figure 2 EVB Setup Configuration Diagram...

Page 7: ...Standard EVB configuration set up the jumpers as shown on Figure 3 If the jumper configuration is in accordance with Jumper Connections on page 8 The VDD D3 and the 5V_CAN D4 LEDs must be ON at startu...

Page 8: ...implemented J23 I O0 configuration 1 2 closed 4 7 kohm pull down resistor to GND and indicator LED implemented 2 3 closed 15 kohm pull up resistor to VSUP and indicator LED implemented J24 I O1 config...

Page 9: ...with VDD ON a transition on CS is a wake up condition 5 TXDC_I CAN bus transmit data input Internal pull up to VDD 6 RXDC CAN bus receive data output 7 I_WAKE_I Active high input to enable on board F...

Page 10: ...in function is to reset the MCU It has an internal pull up to VDD The reset input voltage is also monitored in order to detect external reset and safe conditions 6 MOSI SPI data received by the device...

Page 11: ...rents are sufficient to supply the device 4 To use SPIGen go to the Windows Start menu Programs SPIGen and click on the SPIGen icon The SPIGen Generic SPI Generator GUI will appear 5 Go to the Configu...

Page 12: ...exits DEBUG Mode overrides hardware configuration Adds command to Sequential Mode sequence Adds all commands on tab to Sequential Mode sequence Figure 5 SPIGen Graphical User Interface Commands and Fl...

Page 13: ...of corresponding tab address bits 15 8 not shown Device Selection Function to be written of corresponding tab Send command as configured to corresponding tab address Read device status and enabled fun...

Page 14: ...on tab to Sequential Mode sequence Read device status and enabled functionality Read Device Mode keeps SAFE functionality and exits DEBUG Mode overrides hardware configuration Figure 7 SPIGen Graphica...

Page 15: ...ds sent and received from the SBC s MOSI and MISO pins Figure 8 SPIGen Graphical User Interface Sequential Mode 1 Click Sequential Mode tab This window displays all commands in the Sequential Mode seq...

Page 16: ...of device s features Mouse over for Information Automated state diagram Mouse over for information Figure 9 SPIGen Graphical User Interface Automated State Diagram Mode 1 Click Diagram tab 2 Select No...

Page 17: ...NC_4 20 NC_5 21 NC_6 22 NC_7 27 NC_8 28 NC_9 29 NC_10 30 NC_11 32 NC_12 33 NC_13 34 NC_14 35 NC_15 52 NC_16 53 NC_17 54 J21 HDR 1X2 J21 HDR 1X2 1 2 R20 4 7K R20 4 7K D1 MBRS140 D1 MBRS140 2 1 D13 1N41...

Page 18: ...KIT33905 Evaluation Boards Rev 2 0 18 Freescale Semiconductor Board Layout 9 Board Layout 9 1 Assembly Drawing Figure 11 Assembly Drawing 9 2 Top Side Layer Figure 12 Top Side Layer...

Page 19: ...KIT33905 Evaluation Boards Rev 2 0 Freescale Semiconductor 19 Board Layout 9 3 Bottom Side Layer Figure 13 The Bottom Side Layer...

Page 20: ...TSW 108 07 G D 15 1 J13 DIP14 SKT DIP 14 PINS TH 3M ICE 143 S TG30 16 5 J15 J21 J22 J27 J28 HDR 1X2 HDR 1X2 TH 100MIL SP 330H SN SAMTEC TSW 102 07 T S 17 2 J23 J24 HDR_1X3 HDR 1X3 TH 100MIL SP 330H AU...

Page 21: ...om files analog doc fact_sheet MC33903_4_5FS pdf Application Note www freescale com files analog doc app_note AN3865 pdf Errata http www freescale com files analog doc errata MC33903_4_5ER pdf SPIGen...

Page 22: ...in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regardi...

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