NXP Semiconductors freescale M5251C3 User Manual Download

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M52

51C

3 Ev

aluation

Boa

rd Use

rs Gu

. 0

A-4

scale

Semico

nductor

+3.3V supply decoupling

Default jumper setting between pins 1 & 2, debug mode -BDM.
Setting between pins 2 & 3 enables JTAG mode.
Note: PCB is set-up to boot from BDM. Alternative settings
other than just JP18 position is required for correct boot-up to
JTAG mode - please refer to MCF5251 UM for details.

JP20
A23 Pull-up : Boot from memory connected to CS0/CS4. - default setting.
A23 Pull-down : Boot from on-chip boot ROM. CS0/CS4 function becomes
CS4

JP15
A20/A24 Pull-down : Audio clock taken from CRIN - default setting
A20/24 Pull-up : Audio clock taken from lrck3/gp42 pin

JP14 selects between core running
from internal or external 1.2V supply
Default setting - connect pins 1+2.

Three GPIO lines define the boot type and device.
After initialization of the on-chip resources, the boot
loader reads the status of the GPIO lines and selects
the requested device to boot from.

Boot Mode JP22 JP26 JP30
I2C master 0 0 0
SPI (master) 0 0 1
IDE (master) 0 1 0
I2C slave 1 0 0
UART (5/11 MHz Xtal) 1 0 1
UART (8/16/33 MHz Xtal) 1 1 0
UART (5/10/20 MHz Xtal) 1 1 1

CPU

1.1

MCF5251 Evaluation Board

Monday, November 21, 2005

Freescale - Infotainment, Mutimedia and Telematics Division (IMTD)

Title

Size

Document Number

Rev

Date:

Sheet

A21

A14

A12

A15
A16

A13

A11

A18

A17

A[23:1]

A4
A5

A10

A19

A22

A8
A9

A20

A23

ATAA0
ATAA1
ATAA2

ATAA[2..0]

D16

D25

D19

D21

D30

D18

D22

D28

D26

D29

D27

D23

D[31:16]

D24

ATAD[15..0]

D20

D17

D31

ATAD0
ATAD1
ATAD2
ATAD3
ATAD4
ATAD5
ATAD6
ATAD7
ATAD8
ATAD9
ATAD10
ATAD11
ATAD12
ATAD13
ATAD14
ATAD15

VBUS

ULPID0
ULPID1
ULPID2
ULPID3
ULPID4
ULPID5
ULPID6
ULPID7

+3.3V

+1.2VP

+3.3V

+3.3VP

+3.3V

+5V

+3.3VP

VRTC

+5V

+3.3V

RP10B

47R

RP25D

47R

RP5A

4.7K

RP34A

47R

C127
0.1uF

RP25B

47R

C106
1nF

RP21B

47R

RP17A

47R

C120

0.1uF

RP3D

47R

RP9D

47R

C121
680pF

C104
1nF

C128
680pF

RP39C

47R

RP11B

4.7K

RP8A

47R

L12
BEAD (100MHz)

RP25A

47R

RP19D

47R

RP32D

47R

RP8D

47R

C118
0.1uF

RP16A

4.7K

RP33B

47R

RP38A

47R

RP13D

47R

JP15

RP38C

47R

RP4B

47R

R33

47R

C49
4.7uF 16V

L7
BEAD (100MHz)

RP14B

47R

RP33D

47R

RP5C

4.7K

RP40A

47R

RP21D

47R

C110
680pF

RP17B

47R

RP24C

47R

RP37D

47R

RP31A

47R

RP23C

47R

L6
BEAD (100MHz)

R44

47R

R47
4.7K

R80
10K

RP27B

47R

RP37C

47R

RP8C

47R

RP7B

47R

C134
0.1uF

RP35A

47R

RP16C

4.7K

R42

10K

CON10

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9

RP23A

47R

RP7D

47R

C114
1nF

RP21A

47R

RP34D

47R

RP3C

47R

C122
1nF

RP26C

4.7K

RP5B

4.7K

C129
1nF

RP20D

47R

RP31C

47R

RP14C

47R

RP31B

47R

C117
1nF

RP7C

47R

RP2C

47R

R37

47R

RP39A

47R

RP38B

47R

L10
BEAD (100MHz)

C112
1nF

JP13

JUMPER 2

RP15B

47R

0.3uH

RP9B

47R

RP24A

47R

C130
0.1uF

C108
1nF

RP33C

47R

C109
0.1uF

RP26B

4.7K

RP12A

4.7K

RP16B

4.7K

RP2D

47R

RP23D

47R

RP40C

47R

RP14D

47R

RP14A

47R

RP22A

4.7K

RP20C

47R

RP22D

4.7K

RP32A

47R

RP20B

47R

JP20

RP11C

4.7K

L9
BEAD (100MHz)

RP5D

4.7K

RP35D

47R

C126
1nF

RP17C

47R

RP19B

47R

RP17D

47R

RP4C

47R

RP27C

47R

RP34B

47R

RP24D

47R

RP4A

47R

RP31D

47R

RP13B

47R

RP15D

47R

R35

47R

RP18A

47R

R46
4.7K

RP12C

4.7K

RP16D

4.7K

RP32B

47R

C124
1nF

RP33A

47R

RP13C

47R

RP23B

47R

RP22C

4.7K

RP9C

47R

R40

10K

C132
1nF

R26

6K04 1%

C116
680pF

C111
0.1uF

IC1
MCF5251

A10

A11
A12

A13

A14

A15

B7
B8

B10

B11

B12

B13

B14

B15

C10

C11

C12

C14

C15

D1
D2

D10
D11

D12

D13

D14

D15

E4
E5

E10

E11

E12

E13

E14

E15

F5
F6

F8
F9

F10

F11

F12

F13

F14

F15

G10

H10

H12

H15

J13

J15

K10

K11

K12
K13
K14
K15

L1
L2
L3

L10

L11

L12

L13

L14
L15

M10

M11

M14

M15

N10

N11
N12
N13

N14

N15

P10

P11

P12

P13

P14

P15

R10

R12

R14

GND#

D24

D26

D30

SD-UDQM/GPO53

SD-RAS/GP59

ATA-DMARQ

ATA-A0

ATA-D1

ATA-D6

ATA-D11
ATA-D12

ATA-DIOW

LIN

GND#

D19

D23

D25

D28

SD-BCLK/GP40

SD-CS0/GP60

ATA-A1
ATA-A2

ATA-D0

ATA-D4

ATA-D9

ATA-D14

HI-Z

INOUT

ATA-DIOR

D16

D20

D22

D27

D31

SD-LDQM/GPO52

SD-WE/GP38

ATA-RST

ATA-CS0

ATA-D5

ATA-D10

ATA-DMACK

INGND

CAN1-TX

CAN0-TX

A22

A23/GPO54

A21

D21

D29

SD-CAS/GP39

ATA-IORDY

ATA-INTRQ

ATA-CS1

ATA-D7
ATA-D8

ATA-D15

CAN0-RX

MCLK1/GP11

SDATAO2/GP34

A14

A16

A18

D17
D18

SD-BCLKE/GPO63

PAD-VDD#E7

GND#

PAD-VDD#E9

GND#

ATA-D13

CAN1-RX

SCLK2/GP22

LRCK2/GP23

RSTI

A13

A10

A12

A17

A19

A20/A24

GND#

ATA-D2
ATA-D3

PAD-VDD#F10

TEST0

S/BKPT

TRST/DSCLK

TDI/DSI

A15

A11

GND#

CORE-VDD#

GND#

TEST1

GND#

PST1/GP49

PSTCLK/GP51

PST0/GP50

CORE-VDD#

PAD-VDD#

CORE-VDD#

TEST2

PAD-VDD#

TXD0/GP45

PST3/INTM

1/G

P47

PST2/INTM

2/G

P48

RXD0/GP46

RTC-CRIN

RTC-VDD

CS0

ADOUT/SCLK4/GP58

ADIN5/GPI57

GND#

CORE-VDD#

GND#

DDATA3

/RTS0

/GP4

SCL1/TXD1/GP10

DDATA2

/CTS0

/GP3

SDA1/RXD1/GP44

RTC-VSS

RTC-CROUT

ADIN0/GPI52

AD-VDD

PAD-VDD#K5

BUFENB2/GP30

EBUIN3/CMDSDIO2/GP14

SCLK1/GP20

SDA0/SDATA3/GP42

DDATA0

/CTS1

/SDATA0

SDIO1

/GP1

USB-OSCPAD-GND

ULPI-D4
ULPI-D5
ULPI-D6
ULPI-D7

ADIN1/GPI53
ADIN2/GPI54
ADIN3/GPI55

AD-GND

GND#

PAD-VDD#L6

GND#

PAD-VDD#L8

GND#

PAD-VDD#L10

USB-VSS#L11

USB-VDDP

USB-OSCPAD-VDD

USB-CRIN(24MHZ)
USB-CROUT(24MHZ)

ADIN4/GPI56

ADREF

CRIN

PLL-VDD

IDE-DIOR/GP31

EBUIN2/SCLKOUT/GP13

CS1/QSPICS3/GP28

QSPIDOUT/SFSY/GP27

CFLG/GP5

LRCK3/AUDIOCLK/GP43

USB-ID

USB-VSS#M

USB-VDDA

USB-RES

USB-DP

OSC-PAD-VDD

CROUT

-CORE-VDD#

TA/G

P12

EBUIN1/GP36

RCK/QSPIDIN/QSPIDOUT/GP26

SDATAI1/GP17
SDATAI3/GP8

ULPI-D1
ULPI-D2
ULPI-D3

USB-VBUS

USB-DN

OSC-PAD-GND

-CORE-GND#

IDE-DIOW/GP32

BUFENB1/GP29

EBUOUT1/GP37

QSPICLK/SUBR/GP25

LRCK1/GP19

QSPICS2/MCLK2/GP24

SCL0/SDATA1BS1/GP41

ULPI-CLK

ULPI-DIR

CHPUMP

ULPI-NXT

ULPI-D0

GND#

PLL-GND

IDE-IORDY/GP33

WAKEUP/GP21

XTRIM/TXD2/GP0

QSPICS0/EBUIN4/GP15

SDATAO1/TOUT1/GP18

EF/RXD2/GP6

SCLK3/GP35

DDATA1

/RTS1

/SDATA2

BS2

/GP2

ULPI-STP

PAD-VDD#

CHPUMP-CLK

GND#

QSPICS1/EBUOUT2/GP16

-CORE-GND#

-CORE-VDD#

RP37B

47R

RP26D

4.7K

RP35C

47R

R48
4.7K

RP18C

47R

C105
470pF

RP24B

47R

RP2A

47R

R25

47R

JP14

R43

47R

JP30

RP32C

47R

ULPI

1
3
5
7
9
11
13
15
17
19

2
4
6
8

10
12
14
16
18
20

RP19C

47R

RP7A

47R

RP13A

47R

RP40B

47R

RP20A

47R

RP4D

47R

RP3A

47R

L11
BEAD (100MHz)

RP35B

47R

RP21C

47R

RP12B

4.7K

RP10C

47R

C123
0.1uF

RP19A

47R

RP22B

4.7K

RP11A

4.7K

RP10A

47R

C103
0.1uF

C102
470pF

RP25C

47R

RP34C

47R

C115
0.1uF

RP11D

4.7K

CPC

RP27D

47R

C107
470pF

RP30D

47R

C131
0.1uF

RP39D

47R

RP38D

47R

C119
680pF

JP18
JUMPER 3

L13
BEAD (100MHz)

C99
470pF

R39

47R

C98
470pF

C125
10nF

RP30C

47R

RP8B

47R

L8
BEAD (100MHz)

C50
1uF

cap_1206

C69
10uF

R36

47R

RP37A

47R

RP39B

47R

C100
1nF

C113
680pF

RP2B

47R

RP12D

4.7K

JP26

RP15C

47R

JP11

JUMPER 2

RP26A

4.7K

RP40D

47R

RP15A

47R

R34

47R

RP18B

47R

JP22

RP18D

47R

D9
BAT754S

C101
0.1uF

RP10D

47R

RP3B

47R

C133
680pF

RP9A

47R

SDATAI1/GPIO17

SDATAI3/GPIO8

SDATAO2/GPIO34

SCLK1/GPIO20
SCLK2/GPIO22
SCLK3/GPIO35

LRCK1/GPIO19
LRCK2/GPIO23

LRCK3/GPIO43/AudioClock

EBUIN1/GPIO36

EBUIN2/SCLK_OUT/GPIO13

EBUIN3/CMD_SDIO2/GPIO14

EBUIN4/QSPI_CS0/GPIO15

EBUOUT1/GPIO37

EBUOUT2/QSPI_CS1/GPIO16

SDATAO1/TOUT1/GPIO18

RXD0/GPIO46

TXD0/GPIO45

QSPI_DIN

QSPI_DOUT

QSPI_CLK

CRIN

XTRIM/TXD2/GPIO0

MCLK1/GPIO11

MCLK2/QSPI_CS2/GPIO24

EF/RXD2/GPIO6

CFLG/GPIO5

IDEDIOW/GPIO32
IDEIORDY/GPIO33

BUFENB1/GPIO29
BUFENB2/GPIO30

-TA/GPIO12

-RESET

-OE

R/W

BCLK

-CS1/QSPI_CS3/GPIO28

-SDRAS
-SDCAS
-SDWE
SDUDQM
SDLDQM
BCLKE

-CS0/CS4

D[31:16]

-BKPT
DSI

A[23:1]

DSCLK

DSO

WAKEUP/GPIO21

CROUT

SDRAM_CS0

ADIN0/GPI52
ADIN1/GPI53
ADIN2/GPI54
ADIN3/GPI55
ADIN4/GPI56
ADIN5/GPI57

PSTCLK/GPIO51

PST2/INTMON2/GPIO48
PST3/INTMON1/GPIO47

DDATA1/RTS1_B/SDATA2_BS2/GPIO2

DDATA2/CTS0_B/GPIO3
DDATA3/RTS0_B/GPIO4

PST0/GPIO50

DDATA0/CTS1_B/SDATA0_SDIO1/GPIO1

PST1/GPIO49

LINOUT

SDA1/RXD1/GPIO44

SDA0/SDATA3/GPIO42

SCL0/SDATA1_BS1/GPIO41

SCL1/TXD1/GPIO10

IDEDIOR/GPIO31

CAN1TX

CAN0TX

CAN1RX

CAN0RX

RTCCRIN

USBCRIN

RTCCROUT

USBCROUT

USBDN
USBDP

USBID

USBVBUS

ATAA[2:0]

ATAD[15:0]

ATACS0
ATACS1
ATADIOR
ATADIOW

ATARST
ATAINTRQ
ATADMARQ

ATAIORDY

ATADMACK

Figure 3-4

shows the separate schematic for the MCF5251 Evaluation Board.

Figure 3-4 MCF5251 Evaluation Board

Summary of Contents for freescale M5251C3

Page 1: ...Document Number M5251C3UG Rev 0 05 2006 M5251C3 Evaluation Board Users Guide ...

Page 2: ...oducts for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different appl...

Page 3: ...ystem Power up and Initial Operation 1 9 1 8 M5251C3 Jumper Setup 1 9 1 9 Using the BDM Port 1 11 Chapter 2 Using the Monitor Debug Firmware 2 1 What Is dBUG 2 1 2 2 Operational Procedure 2 2 2 2 1 System Power up 2 2 2 2 2 System Initialization 2 3 2 2 2 1 Hard RESET Button 2 4 2 2 2 2 ABORT Button 2 4 2 2 2 3 Software Reset Command 2 4 2 3 Command Line Usage 2 5 2 4 Commands 2 5 2 4 1 ASM Assemb...

Page 4: ...20 2 4 29 UPDBUG Update dBUG 2 20 2 4 30 UPUSER Update User Flash 2 20 2 4 31 VERSION Display dBUG Version 2 21 2 5 TRAP 15 Functions 2 22 2 5 1 OUT_CHAR 2 22 2 5 2 IN_CHAR 2 22 2 5 3 CHAR_PRESENT 2 23 2 5 4 EXIT_TO_dBUG 2 23 Chapter 3 Hardware Description and Reconfiguration 3 1 Processor and Support Logic 3 1 3 1 1 Processor 3 1 3 1 2 Reset Logic 3 1 3 1 3 HIZ Signal 3 2 3 1 4 Clock Circuitry 3 ...

Page 5: ... OTG Module 3 7 3 3 General Purpose I O Pins 3 8 3 4 Audio Module 3 8 3 5 Analog to Digital Converter ADC Module 3 8 3 6 Flash Memory Card IDE Interface Module 3 9 3 7 ATA Interface Module 3 9 3 8 Real Time Clock RTC Module 3 9 3 9 Debug Connector J12 3 9 Appendix A Schematics Appendix B Evaluation Board BOM ...

Page 6: ...M5251C3 Evaluation Board Users Guide Rev 0 vi Freescale Semiconductor ...

Page 7: ...or programming and evaluating the attributes of the microprocessor In addition there is an IDE and ATA interface for connection to things like an external HDD There is also an SD card interface CAN interface and both analog and digital audio I O connections The board is driven by the MCF5251 device which is a member of the ColdFire family of processors It is a 32 bit processor with a 24 bit addres...

Page 8: ...is pre programmed into the Flash during factory testing RS232 Debug SDRAM 16bit 3 3V Module ColdFire MCF5251 26 pin debug connector Flash CS0 16 bit 3 3v 2MB Data 31 16 Addr 24 1 Oscillators 32 768 KHz 11 2896 MHz 24 MHz 8MB Transceiver CAN Transceiver DB 9 Connector DB 9 Connector Dedicated ATA I F Supports DMA GPIO Connectors Audio ADC I2S3 Headphone Socket RCA Phono plugs Audio Out EBUOUT1 Audi...

Page 9: ... transceiver to make the channels RS 232 compatible P4 An RS 232 serial cable with DB9 connectors is included with the board UART0 channel is the TERMINAL channel used by dBUG for communication with an external terminal PC The TERMINAL baud rate defaults to 19200 1 4 Parallel I O Ports The MCF5251 offers up to 60 lines of general purpose I O of which 6 are dedicated inputs and 3 are dedicated outp...

Page 10: ...M5251C3 Evaluation Board Users Guide Rev 0 1 4 Freescale Semiconductor Figure 1 2 Minimum System Configuration dBUG RS 232 Terminal or PC 7 0 to 14 VDC Input Power ...

Page 11: ...D Edition Wind River literature CD EVB Quickstart Guide hardcopy Warranty card 920 75133 Technical Information Center Worldwide Contact List Freescale Documentation www freescale com digitalaudio M5251C3 Evaluation Board this document MCF5251UM ColdFire Reference Manual ColdFire Programmers Reference Manual CF Flasher Tool TRIO HDD Demonstration Code dBUG Firmware ColdFire Init CAUTION Avoid touch...

Page 12: ...acter Format The character format of the communication channel is fixed at power up or RESET The default character format is 8 bits per character no parity and one stop bit with no flow control It is necessary to ensure that the terminal or PC is set to this format 1 6 6 Connecting the Terminal The board is now ready to be connected to a PC terminal Use the RS232 serial cable to connect the PC ter...

Page 13: ...he channel Most terminal emulation software packages provide a command known as Alt p press the p key while pressing the Alt key to choose the baud rate and character format The character format should be 8 bits no parity one stop bit See Section 1 6 5 Terminal Character Format The baud rate should be set to 19200 Power can now be applied to the board Pin assignments are as follows 1 Data Carrier ...

Page 14: ...M5251C3 Evaluation Board Users Guide Rev 0 1 8 Freescale Semiconductor Figure 1 4 Default Jumper Locations ...

Page 15: ...y 1A and is connected to the board 2 Check that the terminal and board are set for the same character format and baud 3 Press the RESET button to insure that the board has been initialized properly If you still are not receiving the proper response your board may have been damaged Contact Rapid PCB for further instructions For contact details see the front of this manual 1 8 M5251C3 Jumper Setup J...

Page 16: ...interface JP22 JP26 JP30 Not fitted Internal boot ROM mode select JP24 1 2 UART0 RS232 transceiver RX select JP25 1 2 SPI EEPROM M25P40 U14 write protected WP 2 3 SPI EEPROM M25P40 U14 write enabled JP29 1 2 UART0 RS232 transceiver TX select JP31 Not fitted RS232 transceiver RTS select JP32 1 2 Wireless module M1 WAIT signal connected to IDEIORDY 2 3 Wireless module M1 WAIT signal connected to TA ...

Page 17: ...bug module In order to use the BDM simply connect the 26 pin debug connector on the board J12 to the P E BDM wiggler cable provided in the kit No special setting is needed Refer to the ColdFire User s Guide BDM section for additional instructions NOTE BDM functionality and use are supported via third party developer software tools Details may be found on CD ROM included in this kit ...

Page 18: ...M5251C3 Evaluation Board Users Guide Rev 0 1 12 Freescale Semiconductor ...

Page 19: ...he terminal These commands are defined in Section 2 4 Commands The user interface to dBUG is the command line A number of features have been implemented to achieve an easy and intuitive command line interface dBUG assumes that an 80 x 24 character dumb terminal is utilized to connect to the debugger For serial communications dBUG requires eight data bits no parity and one stop bit 8N1 with no flow...

Page 20: ...y be required depending on the command function For commands that accept an optional width to modify the memory access size the valid values are B 8 bit byte access W 16 bit word access L 32 bit long access When no width option is provided the default width is W 16 bit The core ColdFire register set is maintained by dBUG These are listed below A0 A7 D0 D7 PC SR All control registers on ColdFire ar...

Page 21: ...ystem Initialization The act of powering up the board will initialize the system The processor is reset and dBUG is invoked dBUG performs the following configurations of internal resources during the initialization The instruction cache is invalidated and disabled The Vector Base Register VBR points to the Flash However a copy ...

Page 22: ...d Section 2 2 2 3 Software Reset Command 2 2 2 1 Hard RESET Button Hard RESET S1 is the red button Pressing this button causes all processes to terminate resets the MCF5251 processor and board logic and restarts the dBUG firmware Pressing the RESET button would be the appropriate action if all else fails 2 2 2 2 ABORT Button ABORT S2 is the button located next to the RESET button The abort functio...

Page 23: ... Control D cycle up and down through previous command lines Control R recalls and executes the last command line dBUG is not case sensitive Commands may be entered either in uppercase or lowercase depending upon the user s equipment and preference Only symbol names require that the exact case be used Most commands can be recognized by using an abbreviated name For instance entering h is the same a...

Page 24: ...ork GO go addr Execute GT gt addr Execute To HELP help command Help IRD ird module register Internal Register Display IRM irm module register data Internal Register Modify LR lr width addr Loop Read LW lw width addr data Loop Write MD md width begin end Memory Display MM mm width addr data Memory Modify MMAP mmap Memory Map Display RD rd reg Register Display RM rm reg data Register Modify RESET re...

Page 25: ...he command is asm 400000 2 4 2 BC Block Compare Usage BC addr1 addr2 length The BC command compares two contiguous blocks of memory on a byte by byte basis The first block starts at address addr1 and the second starts at address addr2 both of length bytes If the blocks are not identical the address of the first mismatch is displayed The value for addresses addr1 and addr2 may be an absolute addres...

Page 26: ... block of memory starting at 0x00020000 and ending at 0x00040000 with data that increments by 2 for each width the command is bf 20000 40000 0 2 2 4 4 BM Block Move Usage BM begin end dest The BM command moves a contiguous block of memory starting at address begin and stopping at address end to the new address dest The BM command copies memory as a series of bytes and does not alter the original b...

Page 27: ...ed to dBUG By default the initial trigger value for a breakpoint is one but the t option allows setting the initial trigger for the breakpoint If no address is specified in conjunction with the c or t options then all breakpoints are initialized to the values specified by the c or t option Examples To set a breakpoint at the C function main symbol _main see symbol command the command is br _main W...

Page 28: ...s reads the 32 bit word located at 0x00040000 and compares it against the 32 bit value 0x0000ABCD If no match is found then the address is incremented to 0x00040004 and the next 32 bit value is read and compared 2 4 7 DC Data Conversion Usage DC data The DC command displays the hexadecimal or decimal value data in hexadecimal binary and decimal notation The value for data may be a symbol name or a...

Page 29: ...ord format If offset is provided then the destination address of each S record is adjusted by offset The DL command checks the destination download address for validity If the destination is an address outside the defined user space then an error message is displayed and downloading aborted If the S record file contains the entry point address then the program counter is set to reflect this addres...

Page 30: ...ownloading If an entry point address is specified in the S record COFF or ELF file the program counter is set accordingly Examples To download an S record file with the name srec out the command is dn s srec out To download a COFF file with the name coff out the command is dn c coff out To download a file using the default filetype with the name bench out the command is dn bench out To download a ...

Page 31: ...This command displays the internal registers of different modules inside the MCF5xxx In the command line module refers to the module name where the register is located and register refers to the specific register to display The registers are organized according to the module to which they belong The available modules on the MCF5xxx are CS DMA0 DMA1 DMA2 DMA3 DRAMC PP MBUS SIM TIMER1 TIMER2 UART0 a...

Page 32: ...mands available within dBUG the command is help To obtain help on the breakpoint command the command is help br 2 4 16 LR Loop Read Usage LR width addr The LR command continually reads the data at addr until a key is pressed The optional width specifies the size of the data to be read If no width is specified the command defaults to reading word sized data Example To continually read the longword ...

Page 33: ...d data_end the command is md data_start To display a range of bytes from 0x00040000 to 0x00050000 the command is md b 40000 50000 To display a range of 32 bit values starting at 0x00040000 and ending at 0x00050000 md l 40000 50000 2 4 19 MM Memory Modify Usage MM width addr data The MM command modifies memory at the address addr The value for addr may be an absolute address specified as a hexadeci...

Page 34: ...Start End Port Size SDRAM 0x00000000 0x003FFFFF 32 bit Vector Table 0x00000000 0x000003FF 32 bit USER SPACE 0x00020000 0x003FFFFF 32 bit MBAR 0x10000000 0x100003FF 32 bit Internal SRAM 0x20000000 0x20000FFF 32 bit External SRAM 0x30000000 0x3007FFFF 32 bit Flash 0xFFE00000 0xFFFFFFFF 16 bit Chip Selects CS0 Flash CS1 Ethernet controller CS2 not in use CS3 not in use 2 4 21 RD Register Display Usag...

Page 35: ...Reset the Board and dBUG Usage RESET The RESET command resets the board and dBUG to their initial power on states The RESET command executes the same sequence of code that occurs at power on If the RESET command fails to reset the board adequately cycle the power or press the reset button Examples To reset the board and clear the dBUG data structures the command is reset 2 4 24 SET Set Configurati...

Page 36: ...nistrator will have this information filename This is the default filename to be used for network download if no name is provided to the DN command filetype This is the default file type to be used for network download if no type is provided to the DN command Valid values are srecord coff and elf mac This is the ethernet Media Access Control MAC address a k a hardware address for the evaluation bo...

Page 37: ...step 2 4 27 SYMBOL Symbol Name Management Usage SYMBOL symb a symb value r symb c l s The SYMBOL command adds or removes symbol names from the symbol table If only a symbol name is provided to the SYMBOL command then the symbol table is searched for a match on the symbol name and its information displayed The a option adds a symbol name and its value into the symbol table The r option removes a sy...

Page 38: ...he program counter the command is tr To trace 20 instructions from the program counter the command is tr 20 2 4 29 UPDBUG Update dBUG Usage UPDBUG The UPDBUG command is used to update the dBUG image in Flash When updates to the M5251C3 dBUG are available the updated image is downloaded to address 0x00020000 The new image is placed into Flash using the UPDBUG command The user is prompted for verifi...

Page 39: ...ommand displays the version information for dBUG The dBUG version build number and build date are all given The version number is separated by a decimal for example v 2b 1c 1a The version date is the day and time at which the entire dBUG monitor was compiled and built Examples To display the version of the dBUG monitor the command is version In this example v 2b 1c 1a dBUG common major and minor r...

Page 40: ...ction TRAP 15 The character in d1 is sent to terminal C example void board_out_char int ch If your C compiler produces a LINK UNLK pair for this routine then use the following code which takes this into account if l LINK a6 0 produced by C compiler asm move l8 a6 d1 put ch into d1 asm move l 0x0013 d0 select the function asm trap 15 make the call UNLK a6 produced by C compiler else If C compiler d...

Page 41: ...ly example move l 0014 d0 Select the function trap 15 Make the call d0 contains the response yes no C example int board_char_present void asm move l 0x0014 d0 select the function asm trap 15 make the call 2 5 4 EXIT_TO_dBUG This function function code 0x0000 transfers the control back to the dBUG by terminating the user code The register context is preserved Assembly example move l 0000 d0 Select ...

Page 42: ...M5251C3 Evaluation Board Users Guide Rev 0 2 24 Freescale Semiconductor ...

Page 43: ...s with external devices over a 16 bit wide data bus D 31 16 The chip can address 64 Mbytes of memory space using a 25 bit wide address bus and internal chip select logic The MCF5251 processor has the capability to support both an IEEE JTAG compatible port and a BDM debug port These ports are multiplexed and can be used with third party tools to allow the user to download code to the board The boar...

Page 44: ...s the maximum time out period but dBUG does NOT enable the watchdog timer via the SYPCR register SWE bit 3 1 6 Interrupt Sources The ColdFire family of processors can receive seven levels of interrupt priorities When the processor receives an interrupt which has a higher priority than the current interrupt mask in the status register it will perform an interrupt acknowledge cycle at the end of the...

Page 45: ... 4 for more information on ABORT Since the ABORT switch is not capable of generating a vector in response to a level seven interrupt acknowledge from the processor the dBUG programs this interrupt request for autovector mode See the MCF5251 Reference Manual for more information about the interrupt controller 3 1 7 Internal SRAM The MCF5251 processor has 128 Kbtyes of internal memory which may be p...

Page 46: ... map All of the unused area of the memory map is available to the user 3 1 9 Reset Vector Mapping After reset the processor attempts to read the initial stack pointer and program counter values from locations 00000000 00000004 the first eight bytes of memory space This requires the board to have a non volatile memory device in this range with the correct information stored in it In some systems ho...

Page 47: ... a given number of wait states See Table 3 1 for information about the address space of the memory and refer to the manufacturer s specification for wait state requirements of the SDRAM and Flash ROM 3 1 12 SDRAM The M5251C3 has one 64 Mbit device on the board in a 16 bit wide data bus configuration The MCF5251 processor supports one bank of SDRAM which on this board is represented by SDRAM device...

Page 48: ...ound mode for continuous transfers See the MCF5251 Reference Manual for more detail The QSPI signals from the MCF5251 device are brought out to connector J5 Some of these signals are multiplexed with other functions 3 2 3 I2 C Modules The MCF5251 processor s two I2 C modules include the following features Compatibility with the I2 C bus standard Multimaster operation Software programmable for one ...

Page 49: ...rk architecture Multimaster bus High immunity to EMI Short latency time due to an arbitration scheme for high priority messages For further details see the MCF5251 Reference Manual 3 2 5 USB 2 0 OTG Module The MCF5251 processor s USB 2 0 OTG module includes the following features Compliance with USB specification revision 2 0 Support for operation as a standalone USB host controller including supp...

Page 50: ...d to each pin individually Pins can have from 1 to 4 functions including GPIO For further details see the MCF5251 Reference Manual 3 4 Audio Module The MCF5251 processor s audio module includes the following features Support for reception and transmission of digital audio over serial interfaces IIS EIAJ and digital interface IEC958 3x IIS EIAJ interfaces 2x IEC958 receivers 4x multiplexed inputs 1...

Page 51: ... modes 0 1 2 3 and 4 with bus clock of at least 50 MHz Support for ultra DMA mode 5 with bus clock of at least 80 MHz 128 byte FIFO part of interface FIFO receive alarm and FIFO transmit alarm to DMA unit Zero wait cycles transfer between DMA bus and FIFO which allows fast FIFO reading and writing For further details see the MCF5251 Reference Manual 3 8 Real Time Clock RTC Module The MCF5251 proce...

Page 52: ...r Pin Assignment 1 3 5 7 9 11 13 15 17 19 21 23 25 2 4 6 8 10 12 14 16 18 20 22 24 26 BKPT DSCLK DEVELOPER RESERVED DSI DSO PST3 PST1 DDATA3 DDATA1 GND FREESCALE RESERVED PSTCLK TA GND GND RESET GND PST2 PST0 DDATA2 DDATA0 FREESCALE RESERVED GND Core Voltage DEVELOPER RESERVED I O or Pad Voltage ...

Page 53: ...uation Board Users Guide Rev 0 Freescale Semiconductor A 1 Appendix A Schematics This section is composed of the schematics for the M5251C3 Evaluation Board including the schematic for the MCF5251 Evaluation Board ...

Page 54: ... RTCCROUT USBCROUT ATAA 2 0 USBID USBVBUS Sheet6 Serial Intefaces and Clocks SDATAO2 GPIO34 SDATAI3 GPIO8 TXD0 GPIO45 DDATA2 CTS0_B GPIO3 SDA1 RXD1 GPIO44 QSPI_CLK QSPI_DIN QSPI_DOUT EBUIN4 QSPI_CS0 GPIO15 EBUOUT2 QSPI_CS1 GPIO16 MCLK2 QSPI_CS2 GPIO24 CS1 QSPI_CS3 GPIO28 DDATA3 RTS0_B GPIO4 CRIN CROUT LRCK3 GPIO43 AudioClock XTRIM TXD2 GPIO0 RXD0 GPIO46 DDATA1 RTS1_B SDATA2_BS2 GPIO2 SCL1 TXD1 GPI...

Page 55: ... 1 2 C48 10uF 4 7uF 16V JP4 1 2 C5 4 7uF 25V 1 2 R4 470R 1 2 JP1 1 2 R6 10R JP7 JUMPER 3 1 3 2 R10 0R C28 10uF 16V 1 2 U6 GP1FA550RZ 1 2 3 VCC GND VOUT U2 AK5353VT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 AINR AINL VREF VCOM AGND VA VD DGND SDTO LRCK MCLK SCLK PDN DIF TTL TST R2 18R 1 2 C24 0 1uF 1 2 R5 10R C9 0 22uF 1 2 R11 0R C10 0 22uF 1 2 R12 470R C7 2 2nF 1 2 C8 4 7uF 25V 1 2 JP2 1 2 J3 STEREO ...

Page 56: ...GP59 ATA DMARQ ATA A0 ATA D1 ATA D6 ATA D11 ATA D12 ATA DIOW LININ GND A15 D19 D23 D25 D28 SD BCLK GP40 SD CS0 GP60 ATA A1 ATA A2 ATA D0 ATA D4 ATA D9 ATA D14 HI Z LINOUT ATA DIOR D16 D20 D22 D27 D31 SD LDQM GPO52 SD WE GP38 ATA RST ATA CS0 ATA D5 ATA D10 ATA DMACK LINGND CAN1 TX CAN0 TX A22 A23 GPO54 A21 D21 D29 SD CAS GP39 ATA IORDY ATA INTRQ ATA CS1 ATA D7 ATA D8 ATA D15 CAN0 RX MCLK1 GP11 SDAT...

Page 57: ...3 3V TP8 GROUND 1 1 TP1 GROUND 1 1 JP27 1 2 JP21 1 2 TP6 TEST POINT 1 1 TP7 TRANSFER ACK 1 1 J12 Shrouded BDM Header 1 3 5 7 9 11 13 15 17 19 21 23 25 2 4 6 8 10 12 14 16 18 20 22 24 26 1 3 5 7 9 11 13 15 17 19 21 23 25 2 4 6 8 10 12 14 16 18 20 22 24 26 TP3 READ WRITE 1 1 JP28 1 2 TP4 CHIP SELECT 0 1 1 C76 47pF 1 2 TP5 CPU CLOCK OUTPUT 1 1 JP23 1 2 TP2 OUTPUT ENABLE 1 1 DSO DSCLK BKPT DSI RESET C...

Page 58: ...F 1 2 D10 RED IDE LED 2 1 U10 MC74LCX16245DT 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 1 48 25 24 4 10 15 21 28 34 39 45 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 7 18 31 42 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 1DIR 1OE 2OE 2DIR GND 1 GND 2 GND 3 GND 4 GND 5 GND 6 GND 7 GND 8 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 VCC 1 VCC 2 VCC 3 VCC 4 RP...

Page 59: ...0 41 42 43 44 45 46 47 48 A15 A14 A13 A12 A11 A10 A9 A8 A19 NC 1 WE RESET NC 2 NC 3 RY BY A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS 3 OE DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 VCC 2 DQ4 DQ12 DQ5 DQ13 DQ6 DQ14 DQ7 DQ15 A 1 VSS 1 BYTE A16 C67 1nF 1 2 C62 0 1uF 1 2 C60 0 1uF 1 2 U14 M25P40 1 2 3 4 5 6 7 8 S Q W Vss D C HOLD Vcc R41 10K C63 1nF 1 2 C59 0 1uF 1 2 C65 1nF 1 2 C61 0 1uF 1 2 JP17 1 2 U12 K4S28163...

Page 60: ... VOUT ON OFF GND FB TAB R14 560R 1 2 BT1 3 6V NiMH 15mAh C14 0 1uF 1 2 U18 MAX6361 1 2 3 4 5 6 RST GND MR VCC OUT BATT C11 330uF 1 2 R67 4 7K 1 2 C31 0 1uF 1 2 S1 KS11R23CQD RESET 1 2 R16 270R 1 2 R60 270R 1 2 C68 1nF 1 2 C40 1nF 1 2 C1 1nF 1 2 P1 1 2 1 2 C30 1000uF 1 2 R63 270R 1 2 P2 Switchcraft RAPC712 1 2 3 FM1 Fiducial Mark 1 1 C2 0 1uF 1 2 L3 25uH 1 2 U19 TLC7733ID 8 7 5 6 1 4 3 2 VCC SENSE ...

Page 61: ...2K JP19 1 2 C55 22pF U15 MIC2026 1 2 3 4 5 6 7 8 ENA FLGA FLGB ENB OUTB GND IN OUTA U21 MAX3051ESA 1 2 3 4 5 6 7 8 TXD GND VCC RXD SHDN CANL CANH RS C46 22pF C54 22pF C94 0 22uF 1 2 J8 MINIAB 1 2 3 4 5 JP38 3 4 1 2 R21 15K U5 NC7SZU04 1 2 3 5 4 x A GND VCC Y FLGB 1 C95 0 22uF 1 2 R31 0R R20 1K R50 10K C42 4 7uF R82 10K JP31 3 4 1 2 JP8 1 2 J7 USB CONA 1 2 3 4 JP37 1 2 R23 0R RP29 4x 4 7K 1 2 3 4 5...

Page 62: ...1 2 LK39 1 2 R64 100K R59 47K LK11 1 2 LK40 1 2 LK34 1 2 LK9 1 2 R72 68K R73 68K SW6 LK8 1 2 SW3 SW8 R74 68K R77 47K C84 1uF LK10 1 2 J14 Switchcraft RAPC712 1 2 3 LK13 1 2 LK16 1 2 SW5 LK4 1 2 R70 68K C88 4 7uF C83 1uF SW7 SW2 C82 1uF LK12 1 2 LK17 1 2 SW4 LK3 1 2 R65 100K LK1 1 2 C81 1uF LK23 1 2 LK18 1 2 LK6 1 2 LK22 1 2 R75 10K LK19 1 2 LCD2 MOBI3007 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1...

Page 63: ... C156 C159 C162 C164 C165 C170 0 1uF Cap 0 1uf 50v X7R 0603 10 6 9 C4 C10 C86 C121 C122 C133 C139 C172 C173 10uF Cap 10uF 16v SMT Elect 4mm 4 3mm base 7 12 C6 C8 C157 C158 C174 C175 C176 C177 C178 C179 C180 C181 1uF Cap 1 uF35v SMT Electrolytics 8 5 C11 C12 C87 C90 C97 AVX TPSE337K10CLR Cap Tan 330UF D 10V Low ESR 9 6 C13 C14 C99 C100 C103 C104 0 22uF Cap 0 22uF 0603 16V 10 5 C23 C24 C25 C26 C143 ...

Page 64: ... 2540 6002UB HDR20x2_Shrouded 31 2 J9 J10 MR 551L RCA PHONO JACK 32 1 J11 350211 1 PC power 33 1 J13 S1011 10 CON10 34 1 J14 S2011 05 CON10A 0 1 pitch 2x5 Header 35 1 J15 S1011 15 CON15 36 1 J17 KMAB SMT 5S S 30TR MINIAB 37 1 J18 87520 0010B USB CONA 38 1 J19 76342 315 HEADER 30 39 2 J20 P1 RAPC712 40 1 J21 FPS009 2203 10 41 12 JP1 JP4 JP7 JP50 JP79 JP80 JP84 JP91 JP92 JP93 JP98 JP100 S2105 03 or ...

Page 65: ...41 LINK 51 1 M1 Wi Fi Module APM6125 52 1 P2 2SV 02 or 571 14376711 Conn 2 pin thru hole 53 2 P3 P4 748875 1 or747844 3 DB9 RS232 PORT THRU HOLE DB9 54 1 POT1 3214W 1 105E TRIMMER SMD 5 TURN 1M RoHS Compliant TBA Resistance 100kR Power rating 0 25W 55 3 R101 R128 R151 1M 56 3 R1 R2 R118 10R 57 11 R31 R43 R44 R100 R131 R158 R163 R167 R168 R176 R177 10K 58 29 RP14 RP15 RP16 RP17 RP18 RP19 RP20 RP22 ...

Page 66: ...171 R172 R173 68K 78 10 RP2 RP5 RP41 RP43 RP44 RP6 RP7 RP8 RP9 RP53 4x 4 7K 79 1 RP54 4x 10K 80 1 S1 KS11R23CQD 81 1 S2 KS11R22CQD 82 1 SMA1 1053378 1 or 901 143 6RFX SMA_connector 83 8 SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SDTX 620N 84 0 TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TEST POINT 85 1 U1 AK4366VT 86 1 U15 LM833D 87 1 U6 AM29LV160DB90EC 88 1 U7 K4S641633D G 4Mx16 52PBGA 4x13 89 1 U8 LT1086CM 90 0 U9 MAX...

Page 67: ...20 GP1FA550RZ REPLACEMENT PART GP1FA553RZ GP1FA550RZ REPLACEMENT PART GP1FA553RZ 100 0 U21 GP1FA550TZ Replacement GP1FA551TZ 425 1101 5 ND GP1FA550TZ Replacement GP1FA551TZ 425 1101 5 ND 101 1 U22 SN74ALVCH374PWR IC 20 Pin TSSOP 102 1 U23 CY2300SC IC 8 PIN SOIC 103 0 U24 MAX3051ESA 104 1 U25 MIC2026 105 2 X1 X2 ABL 11 2896MHz Xtal 11 2896 MHz 106 1 X3 HC49US24 000MABJ Xtal 24 MHz HC49U 107 1 X4 C ...

Page 68: ...M5251C3 Evaluation Board Users Guide Rev 0 B 6 Freescale Semiconductor ...

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