Distributor of NXP Semiconductors: Excellent Integrated System Limited
Datasheet of MCIMX53SMD - TABLET SABRE PLATFORM MCIMX53
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com
36
MCIMX53SMD Board Hardware User’s Guide, Rev. 0
Freescale Semiconductor
The logic levels on 24 different pins that are designated for boot mode configurations
Internal eFUSE settings
A serial downloader (USB/UART)
There are two dedicated BOOT_MODE pins in the i.MX53 processor that specify where the processor should
find its boot information.
Table 5-4
shows the settings of BOOT_MODE pins for each of these methods.
Developers should remember that these two pins are tied to the NVCC_RESET modules, and therefore, on the
MCIMX53SMD board, they use a 1.8V logic level (unlike the Boot Configuration pins that use a 3.3V logic
level). The default boot selection for the MCIMX53SMD board is 00 – Boot from hardware settings. The
settings of the BOOT_MODE pins can be changed by using the optional DIP switches, SW28.3 and SW28.4. It is
less likely that developers want to boot the processor from eFUSEs as eFUSEs may get damaged during the
boot process. Developers can use the serial downloader method to boot the processor by turning both the DIP
switches to ON.
BOOT_MODE1
BOOT_MODE0
Boot Selection
0
0
Boot from hardware settings
0
1
Reserved
1
0
Boot from eFUSE settings
1
1
Use serial downloader
Table 5-4.
BOOT_MODE Pin Settings
If hardware settings are used to boot the processor, then, i.MX53 pins are sampled at the beginning of the
boot process. These pins are explained in
Table 5-5A
and
Table 5-5B
, along with their default setting on the
MCIMX53SMD board. Note that three bits in the BOOT_CFG words do not have corresponding pins to read.
The MCIMX53SMD board supports four types of boot sources: SPI NOR, SD Card (eSDHC1), eMMC4.4
(eSDHC3), and SSD SATA. So, we only keep the relative configure pins for the boot source.
BOOT_
CFG2[5]
BOOT_
CFG2[6]
BOOT_
CFG2[7]
BOOT_
CFG1[3]
BOOT_
CFG1[4]
BOOT_
CFG1[5]
BOOT_
CFG1[6]
PIN
EIM_DA0 EIM_EB1 EIM_EB0 EIM_A18 EIM_A19 EIM_A20 EIM_A21
Default
0
0
0
0
0
0
0
SW26
1
2
3
4
5
6
7
Table 5-5A. BOOT_CFG Word1
BOOT_
CFG3[5]
BOOT_
CFG3[4]
BOOT_
CFG3[3]
BOOT_
CFG2[2]
PIN
EIM_DA6 EIM_DA7 EIM_DA8 EIM_DA9
Default
0
0
1
1
SW28
1
2
3
4
Table 5-5B. BOOT_CFG Word2
The four pins that determine where bootable code is stored are BOOT_CFG1[6:3]. Depending on which boot
source is selected, some of these pins may have different meanings. Those pins will show up as an ‘X’ for logic
level. The specific logic levels and their meanings are as follows:
BOOT_CFG1[6:3]
Boot Code Source Selection
010X
- PATA/SATA Boot
37 / 82
37 / 82