NXP Semiconductors
FS4500/FS6500 evaluation boards
KTFRDMFS4500-FS6500EVMUG
FS4500/FS6500 evaluation boards
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User guide
Rev. 4.0 — 12 June 2017
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Pin number
Connection
Description
9
Not Connected
10
Not Connected
11
Not Connected
12
GND
Connects to ground
13
DBG
Debug pin selection
14
GND
Connects to ground
15
RSTB
Reset, active low
16
Not Connected
4.5.4.5 I/O connector (J1_FRDM)
The I/O connector accesses the device under test (DUT) IO and V
KAM
signals.
Table 11. I/O connector (J1_FRDM)
Pin number
Connection
Description
1
Vkam_IO5
Keep alive memory voltage
2
Not Connected
3
Not Connected
4
Not Connected
5
Key
Ignition signal
6
Not Connected
7
IO_2
Input/Output 2
8
Not Connected
9
IO_3
Input/Output 3
10
Not Connected
11
IO_4
Input/Output 4
12
Not Connected
13
Not Connected
14
Not Connected
15
Not Connected
16
Not Connected
4.5.4.6 Power supply connector (J2)
The power supply connector (J2) connects any of the SBC regulators to an external load
or board for evaluation purposes.
Table 12. Power supply connector (J2)
Pin number
Connection
Description
1
V
CCA
V
CCA
output voltage
2
GND
Ground