ERR003729
Chip Errata for the i.MX 6Dual/6Quad and i.MX 6DualPlus/6QuadPlus, Rev. 6.1, 06/2016
32
NXP Semiconductors
Description:
Event 0x68 counts the total number of instructions passing through the register rename pipeline
stage. Under certain conditions, some branch-related instructions might pass through this pipeline
stage without being counted. As a consequence, event 0x68 might be inaccurate, lower than
expected. The event is also reported externally on PMUEVENT[9:8], which suffers from the same
inaccuracy.
Conditions:
The erratum occurs when the following conditions are met:
• Events are enabled
• One of the PMU counters is programmed to count event 0x68 — number of instructions passing
through the register rename stage. Alternatively, an external component counts, or relies on,
PMUEVENT[9:8].
• A program, containing the following instructions, is executed:
— A Branch immediate, without Link
— An ISB instruction
— An HB instruction, without Link and without parameter, in Thumb2EE state
— An ENTERX or LEAVEX instruction, in Thumb2 or Thumb2EE state
• The program executed is causing some stalls in the processor pipeline
Under certain timing conditions specific to the Cortex-A9 micro-architecture, a cycle stall in the
processor pipeline might “hide” the instructions mentioned above, thus ending with a corrupted
count for event 0x68, or a corrupted value on PMUEVENT[9:8] during this given cycle. If the
“hidden” instruction appears in a loop, the count difference can be significant.
As an example, let’s consider the following loop:
loop mcr 15, 0, r2, cr9, cr12, {4}
adds r3, #1
cmp.w r3, #loop_number
bne.n loop
The loop contains four instructions; so, the final instruction count should (approximately) be four
times the number of executed loops. In practice, the MCR is causing a pipeline stall that “hides”
the branch instruction (bne.n); so, only three instructions are counted per loop, and the final count
appears as three times the number of executed loops.
Projected Impact:
The implication of this erratum is that the values of event 0x68 and PMUEVENT[9:8] are
imprecise, and cannot be relied upon.
Workarounds:
No workaround is possible to achieve the required functionality of counting how many instructions
are precisely passing through the register rename pipeline stage.
ERR003729
ARM: 740663—Event 0x68 / PMUEVENT[9:8] may be inaccurate
