Boundary Clock
(LS1021ATSN)
SGMII
SGMII
SGMII
SGMII
SGMII
SGMII
Ordinary Clock
(LS1021ATSN)
Ordinary Clock
(LS1021ATSN)
Figure 7. LS1021ATSN BC synchronization
7. Ethernet interfaces connection for transparent clock (TC) synchronization
At least three boards are required for TC synchronization. One must be LS1021ATSN board, which is needed as a
transparent clock since there is a SJA1105 switch on it. When three boards are used for TC synchronization, assuming
board A (LS1021ATSN) works as TC with two PTP ports, board B and board C work as OCs.
i.MX6Q SabreSD supports only the master-slave mode.
NOTE
Table 20. Connecting Ethernet interfaces for TC (transparent clock)
Board
Clock Type
Interfaces used
A (LS1021ATSN)
TC
Interface 1, Interface 2. (These are two ports of SJA1105
switch.)
B
OC
Interface 1
C
OC
Interface 1
• Connect board A interface 1 to board B interface 1 in a back-to-back manner.
• Connect board A interface 2 to board C interface 1 in a back-to-back manner. For example, LS1021ATSN TC
synchronization connection is shown in the following figure.
NXP Semiconductors
Industrial features
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