NXP Semiconductors
AN10050
Designing a Hi-Speed USB host PCI adapter using ISP1562/63
AN10050_4
© NXP B.V. 2007. All rights reserved.
Application note
Rev. 04 — 1 November 2007
8 of 18
•
The maximum allowed length of the DP and DM lines for onboard solutions (or [trace
+ cable length] for a front-panel solution) is 18 inches.
•
A decoupling capacitor must be placed on V
BUS
as close as possible to each USB
connector. A value of about 150 µF/10 V is recommended on each port.
•
The common-mode choke used, if really necessary, on the DP and DM lines must be
placed as close as possible to the USB connector and must have
Z
com
< 8
Ω
@ 100 MHz and Z
diff
< 300
Ω
@ 100 MHz.
•
The common-mode choke, as well as the ElectroStatic Discharge (ESD) protection
components will be used only if necessary (in case the design does not pass EMI or
the ESD tests) because these may affect the signaling quality. Nevertheless, it is
recommended that you include the necessary footprints for common-mode chokes
and ESD protection components on the PCB as safeguards. The footprints must be
placed as close as possible to the USB connector. Special attention must be given
when placing additional components on the DP and DM lines and routing
recommendations must be followed.
•
Both V
DDA_AUX
(analog) and
V
CC(I/O)_AUX
(digital) are derived from the PCI V
AUX
voltage,
found on pin A14 of the PCI connector.
V
CC(I/O)_AUX
can directly be connected to PCI
V
AUX
. V
DDA_AUX
is separated from PCI V
AUX
by an inductor and each of
V
CC(I/O)_AUX
and
V
DDA_AUX
uses its own decoupling capacitors.
•
The design must ensure that the V
DDA_AUX
and
V
CC(I/O)_AUX
power planes are isolated
from the main PCI 3.3 V power plane. This is achieved by creating two separate
power planes that do not come in contact with the PCI 3.3 V power plane.
•
The decoupling capacitors must be placed as close as possible to the ISP1562/3. A
good choice is the four corners of the IC because these areas will not normally be
occupied by traces or other components, according to the ISP1562/3 pinout.
•
For good EMI testing results, it is recommended that you provide a good path from
the USB connector shell to the chassis ground. The USB connector shell must be
connected to an isolated ground plane.
For more information, refer to the Intel document
The USB 2.0 Platform Design
Guideline, Rev. 1.0
.
5. Schematics
