KTPF3000FRDMEVMUG, Rev. 2.0
Freescale Semiconductor
7
Getting to Know the Hardware
3.5 Device Description
The PF3000 device populated on KITPF3000FRDMEVM features the A1 OTP. See
Figure 3
.
Table 3. Start-up Configuration
(3)
Registers
Value
Default I
2
C Address
0x08
VSNVS_VOLT
3.0 V
SW1A_VOLT
1.10 V
SW1A_SEQ
1
SW1B_VOLT
1.0 V
SW1B_SEQ
1
SW2_VOLT
1.8 V
SW2_SEQ
2
SW3_VOLT
1.35 V
SW3_SEQ
5
SWBST_VOLT
5.0 V
SWBST_SEQ
OFF
VLDO1_VOLT
1.8 V
VLDO1_SEQ
4
VLDO2_VOLT
1.5 V
VLDO2_SEQ
4
VLDO3_VOLT
3.3 V
VLDO3_SEQ
3
VLDO4_VOLT
3.3 V
VLDO4_SEQ
3
V33_VOLT
3.3 V
V33_SEQ
3
VCC_SD_VOLT
3.3 V/1.85 V
VCC_SD_SEQ
4
PU CONFIG, SEQ_CLK_SPEED
2000 µs
PU CONFIG, SWDVS_CLK
12.5 mV/µs
PU CONFIG, PWRON
Level sensitive
SW1A/B CONFIG
SW1A, SW1B Independent Mode, 2.0 MHz
SW2 CONFIG
2.0 MHz
SW3 CONFIG
2.0 MHz
PG EN
RESETBMCU in Default Mode
Notes:
3.
This table specifies the default output voltage of the LDOs and SWx after
start-up and/ or when the LDOs and SWx are enabled. VREFDDR_SEQ is
internally fixed to be same as SW3_SEQ. VCC_SD voltage depends on the
state of the SD_VSEL pin.
