General Purpose Timer Modules
MCF5253 Reference Manual, Rev. 1
11-6
Freescale Semiconductor
11.6.5
Timer Initialization Example Code
There are two timers on the MCF5253. With a 70 MHz clock, the maximum period is 3.83 seconds and a
resolution of 14.3 ns. The timers can be free running or count to a value and reset. The following examples
set up the timers:
Timer0 will count to $AFAF, toggle its output, and reset back to $0000. This will continue infinitely until
the timer is disabled or a reset occurs. No interrupts are set. Prescale is set at 256 and the system clock is
divided by 16, therefore resolution is (16
×
(256))/70 MHz = 58.51us. Timeout period is
(16
×
256
×
44976)/70 MHz = 2.63s ($0 - $AFAF = 44976 decimal).
NOTE
The timers were initialized in the SIM to have interrupt values. The
following examples have the interrupts disabled. The initialization in the
SIM configuration was for reference. The Timers CANNOT provide
interrupt vectors, only autovectors.
Autovectors and ICRs have been set up as follows. The interrupt levels and priorities were chosen by
random for demonstrative purposes. Users should define the interrupt level and priorities for their specific
application.
11.6.5.1
Timer0 (Timer Mode Register)
Bits 15:8 sets the prescale to 256 ($FF)
Bits 7:6 set for no interrupt (“00”)
Bits 5:4 sets output mode for “toggle”. No interrupts(“10”)
Bits 3 set for “restart” (“1”)
Bits 2:1 set the clocking source to system clock/16 (“10”)
Bit 0 enables/disables the timer (“0”)
move.w #$FF2C,D0;Setup the Timer mode register (TMR0)
move.w D0,TMR1;
Bit 1 is set to 0 to disable the timer
move.w #$0000,D0; writing to the timer counter with any value resets it to zero
move.w D0,TCN1;
11.6.5.2
Timer0 (Timer Reference Register0)
The TRR register is set to $AFAF. The timer will count up to this value (TCN = TRR), toggle the “TOUT”
pin, and reset the TCN to $0000.
move.w #$AFAF,D0;Setup the Timer reference register (TRR0)
move.w D0,TRR1
Other registers used for TIMER 0
TCR0;TIMER0 Capture Register, 16-bit, R
TER0;TIMER0 Event Register, 8-bit, R/W
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...