Universal Serial Bus Interface
MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor
24-41
24.6.3.19 Endpoint Status Register (ENDPTSTATUS), Non-EHCI
This register is not defined in the EHCI specification. This register is used by the USB OTG module only
in device mode.
15–4
Reserved.
3–0
FERB
Flush endpoint receive buffer. Writing a one to a bit(s) will cause the associated endpoint(s) to clear any primed buffers.
If a packet is in progress for one of the associated endpoints, then that transfer will continue until completion. The
hardware will clear this register after the endpoint flush operation is successful.
Address MBAR2 + 0x7B8
Access: User read
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
ETBR
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
ERBR
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 24-31. Endpoint Status (ENDPTSTATUS) Register
Table 24-33. Endpoint Status (ENDPTSTATUS) Register Field Descriptions
Field
Description
31–20 Reserved.
19–16
ETBR
Endpoint transmit buffer ready. One bit for each endpoint indicates status of the respective endpoint buffer. This bit is
set by the hardware as a response to receiving a command from a corresponding bit in the ENDPTPRIME register.
There will always be a delay between setting a bit in the ENDPTPRIME register and endpoint indicating ready. This
delay time varies based upon the current USB traffic and the number of bits set in the ENDPTPRIME register. Buffer
ready is cleared by USB reset, by the USB DMA system, or through the ENDPTFLUSH register. ETBR[3] (bit 19 of the
register) corresponds to endpoint 3.
Note: These bits will be momentarily cleared by the hardware during hardware endpoint re-priming operations when
a dTD is retired, and the dQH is updated.
15–4
Reserved.
3–0
ERBR
Endpoint receive buffer ready. One bit for each endpoint indicates status of the respective endpoint buffer. This bit is
set by the hardware as a response to receiving a command from a corresponding bit in the ENDPTPRIME register.
There will always be a delay between setting a bit in the ENDPTPRIME register and endpoint indicating ready. This
delay time varies based upon the current USB traffic and the number of bits set in the ENDPTPRIME register. Buffer
ready is cleared by USB reset, by the USB DMA system, or through the ENDPTFLUSH register. ERBR[3] (bit 3 of the
register) corresponds to endpoint 3.
Note: These bits will be momentarily cleared by the hardware during hardware endpoint re-priming operations when
a dTD is retired, and the dQH is updated.
Table 24-32. Endpoint Flush (ENDPTFLUSH) Register Field Descriptions (continued)
Field
Description
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...
