FlexCAN Module
MCF5253 Reference Manual, Rev. 1
25-8
Freescale Semiconductor
25.5.2
FlexCAN Control Register (CANCTRLn)
CANCTRL
n
is defined for specific FlexCAN control features related to the CAN bus, such as bit-rate,
programmable sampling point within an Rx bit, loop back mode, listen-only mode, bus off recovery
behavior, and interrupt enabling. It also determines the division factor for the clock prescaler. Most of the
fields in this register should only be changed while the module is disabled or in freeze mode. Exceptions
are the BOFFMSK, ERRMSK, and BOFFREC bits, which can be accessed at any time.
25
SOFTRST
Soft reset. When set, the FlexCAN resets its internal state machines (sequencer, error counters, error flags, and
timer) and the host interface registers (CANMCRn [except the MDIS bit], TIMER, ERRCNT, ERRSTAT, IMASK, and
IFLAG).
The configuration registers that control the interface with the CAN bus are not changed (CANCTRLn, RXGMASKn,
RX14MASKn, RX15MASKn). Message buffers are also not changed. This allows SOFTRST to be used as a debug
feature while the system is running.
Since soft reset is synchronous and has to follow a request/acknowledge procedure across clock domains, it may
take some time to fully propagate its effect. The SOFTRST bit remains set while reset is pending and is
automatically cleared when reset completes. The user should poll this bit to know when the soft reset has
completed.
0 Soft reset cycle completed
1 Soft reset cycle initiated
24
FRZACK
Freeze acknowledge. Indicates that the FlexCAN module has entered freeze mode. The user should poll this bit
after freeze mode has been requested, to know when the module has actually entered freeze mode. When freeze
mode is exited, this bit is cleared once the FlexCAN prescaler is enabled. This is a read-only bit.
0 The FlexCAN has exited freeze mode and the prescaler is enabled.
1 The FlexCAN has entered freeze mode, and the prescaler is disabled.
23
SUPV
Supervisor/user data space. Places the FlexCAN registers in either supervisor or user data space.
0 Registers with access controlled by the SUPV bit are accessible in either user or supervisor privilege mode.
1 Registers with access controlled by the SUPV bit are restricted to supervisor mode.
22–21
Reserved, should be cleared.
20
LPMACK
Low power mode acknowledge. Indicates that FlexCAN is disabled. Disabled mode cannot be entered until all
current transmission or reception processes have finished, so the CPU can poll the LPMACK bit to know when the
FlexCAN has actually entered low power mode. See
Section 25.3.2.3, “Module Disabled Mode”
for more
information. This bit is read-only.
0 FlexCAN not disabled.
1 FlexCAN is in disabled mode.
19–5
Reserved, should be cleared.
5–0
MAXMB
Maximum number of message buffers. Defines the maximum number of message buffers that will take part in the
matching and arbitration process. The reset value (0x1F) is equivalent to 32 message buffer (MB) configuration.
This field should be changed only while the module is in freeze mode.
Note:
Table 25-2. FlexCAN Configuration Register (CANMCRn) Field Descriptions (continued)
Field
Description
Maximum MBs in Use = MAXMB + 1
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...
