Queued Serial Peripheral Interface (QSPI) Module
MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor
16-13
16.4.7
Command RAM Registers (QCR0–QCR15)
The command RAM is accessed using the upper byte of QDR. The QSPI cannot modify information in
command RAM.
There are 16 bytes in the command RAM. Each byte is divided into two fields. The chip select field enables
external peripherals for transfer. The command field provides transfer operations.
NOTE
The command RAM is accessed only using the most significant byte of
QDR and indirect addressing based on QAR[ADDR].
Address MBAR + 0x414
Access: User read/write
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
DATA
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 16-9. QSPI Data Register (QDR)
Address QAR[ADDR]
Access: User write only
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
W
CONT
BITSE
DT
DSCK
QSPI_CS
Reset
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Figure 16-10. Command RAM Registers (QCR0–QCR15)
Table 16-7. Command RAM Registers (QCRn) Field Descriptions
Field
Description
15
CONT
Continuous.
0 Chip selects return to inactive level defined by QWR[CSIV] when transfer is complete.
1 Chip selects remain asserted after the transfer of 16 words of data
11
.
14
BITSE
Bits per transfer enable.
0 Eight bits
1 Number of bits set in QMR[BITS]
13
DT
Delay after transfer enable.
0 Default reset value.
1 The QSPI provides a variable delay at the end of serial transfer to facilitate interfacing with peripherals that have
a latency requirement. The delay between transfers is determined by QDLYR[DTL].
12
DSCK
Chip select to QSPI_CLK delay enable.
0 Chip select valid to QSPI_CLK transition is one-half QSPI_CLK period.
1 QDLYR[QCD] specifies the delay from QSPI_CS valid to QSPI_CLK.
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...
