Audio Interface Module (AIM)
MCF5253 Reference Manual, Rev. 1
17-8
Freescale Semiconductor
17.5
Serial Audio Interface (I
2
S/EIAJ) Register Descriptions
There are a total of three serial audio interfaces. Each interface can handle Philips I
2
S or Sony EIAJ
protocol. Interface 1 is a receive/transmit interface. Interface 2 is transmit only, Interface 3 is a receive
only. Every serial audio interface block has a 32-bit configuration register associated with it.
NOTE
Each of the three I
2
S interfaces is capable of operating in Philips I
2
S mode
or Sony EIAJ mode with either 32, 36, or 40 bits per word clock. Timing
diagrams describing each of these modes are given in the following
sections. The frequency of the clock and data signals is programmable, as is
the inversion of the bit clock (SCLK) or word clock (LRCK) for each I
2
S
interface.
Inversion of the LRCK clock only operates correctly on a slave receiver, therefore IIS3. If IIS1 is being
used for transmit and receive in master mode then LRCK will be inverted on both the input and the output.
Thereby cancelling the effect.
The SCLK and LRCK signals for each I
2
S interface can either be inputs to the interface or they can be
generated internally (outputs). See
.
illustrates the valid bits in the IIS1 Configuration Registers and
description of the bit fields.
illustrates the valid bits in the IIS2 Configuration Registers and
description of the bit fields.
Address MBAR2 + 0x10 (reset 0x0fc8)
Access: User read/write
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
EF/CFLG
INSERT
CFLG SAMPLE
POSITION
TXSOURCE
SELECT
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
CLOCKSEL
TX FIFO
CONTROL
TXSOURCE
SELECT
SIZE
MODE
LRCK
FREQUENCY
LRCK INVERT
SCLK
INVERT
W
Reset
0
0
0
0
1
1
1
1
1
1
0
0
1
0
0
0
Figure 17-2. IIS1 Configuration Registers (0x10)
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...
