Hardware
Considerations
Migration Guide from MKW36Z512xxx4 to MKW35Z512xxx4, User's Guide, Rev. 1, 06/2019
NXP Semiconductor
3
PTB3
ADC0_SE2/
CMP0_IN4
PTB3
LPUART1_
RTS_b
CLKOUT
TPM1_CH1
RTC_
CLKOUT
PTB16
EXTAL32K
PTB16
LPUART1_
RX
I2C1_SCL
TPM2_CH0
PTB17
XTAL32K
PTB17
LPUART1_
TX
I2C1_SDA
TPM2_CH1
BSM_CLK
PTB18
ADC0_SE4/
CMP0_IN2
PTB18
LPUART1_
CTS_b
I2C1_SCL
TPM_
CLKIN0
TPM0_CH0
NMI_b
PTC3
PTC3/
LLWU_P11
RX_
SWITCH
I2C1_SDA
LPUART0_
TX
TPM0_CH1
DTM_TX
SPI1_SIN
CAN0_TX
PTC4
PTC4/
LLWU_P12/
BLE_RF_
ACTIVE
EXTRG_IN
LPUART0_
CTS_b
TPM1_CH0
BSM_DATA
SPI1_PCS0
CAN0_RX
PTC16
PTC16/
LLWU_P0/
RF_
STATUS
SPI0_SCK
I2C0_SDA
LPUART0_
RTS_b
TPM0_CH3
LPUART1_
RTS_b
PTC17
PTC17/
LLWU_P1/
RF_EXT_
OSC_EN
SPI0_SOUT
I2C1_SCL
LPUART0_
RX
BSM_
FRAME
DTM_RX
LPUART1_
RX
PTC18
PTC18/
LLWU_P2
SPI0_SIN
I2C1_SDA
LPUART0_
TX
BSM_DATA
DTM_TX
LPUART1_
TX
PTC19
PTC19/
LLWU_P3/
RF_
EARLY_
WARNING
SPI0_PCS0
I2C0_SCL
LPUART0_
CTS_b
BSM_CLK
LPUART1_
CTS_b
Table
2 is not a full description of the MKW35/36 pinout.
NOTE
There is a change in the number of available digital pins between 40-pin
and 48-pin packages due to different number of pins. For example, in the
48-pin package, there is a total of 25 digital pins while in the 40-pin
package, 18 digital pins are available.
2.2. MCU On-chip Memory
2.2.1 MKW36 Flash Memory
Summary of Contents for MKW35Z512xxx4 Series
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